公开(公告)号：US5994790A

公开(公告)日：1999-11-30

申请号：US53764

申请日：1998-04-02

申请人： Yoshikazu Nagashima ,  Kaoru Kurita ,  Yukihiko Umeda

发明人： Yoshikazu Nagashima ,  Kaoru Kurita ,  Yukihiko Umeda

IPC分类号： G01R19/00 ,  B60R16/02 ,  G01R19/165 ,  H02H3/087 ,  H02H3/093 ,  H02H5/04 ,  H02H3/08

CPC分类号： H02H3/087 ,  H02H3/0935 ,  H02H5/041 ,  H02H5/044 ,  Y10T307/406 ,  Y10T307/865

摘要： A method of detecting an abnormal electric current in a vehicle to detect passage of an abnormal electric current through an electric wire for establishing the connection between a load to which electric power is supplied and a power source, the method of detecting an abnormal electric current in a vehicle comprising the steps of: (a) detecting values of electric currents which pass through the electric wire at predetermined sampling intervals; (b) counting the number of times in a unit detection period that a sampled electric current having a value larger than a predetermined value is detected and determining passage of an abnormal electric current through the electric wire when the number of counts is larger than a first number of times; and (c) counting the number of times that a sampled electric current having a value larger than the predetermined value is detected in a unit detection period after the unit detection period in terms of time in a case where the number of counts is smaller than the first number of times and except for zero and determining passage of an abnormal electric current through the electric wire when the number of counts is larger than a second number of times.

摘要翻译： 一种检测车辆中的异常电流的方法，用于检测通过用于建立供给电力的负载与电源之间的连接的电线的异常电流的通过，检测异常电流的方法 一种车辆，包括以下步骤：（a）以预定的采样间隔检测通过电线的电流值; （b）对单位检测期间的次数进行计数，检测出具有大于预定值的值的采样电流，并且当计数数大于第一个时，确定通过电线的异常电流的通过 次数; 以及（c）计数在单位检测期间内的单位检测期间中，在计数次数小于所述单位检测期间的时间内，检测出具有比规定值大的取样电流的次数 第一次，除了零，并且当计数数量大于第二次数时，确定通过电线的异常电流的通过。

公开(公告)号：US08841965B2

公开(公告)日：2014-09-23

申请号：US13607509

申请日：2012-09-07

申请人： Yoshikazu Nagashima

发明人： Yoshikazu Nagashima

IPC分类号： H03F3/38

CPC分类号： H03F3/45475 ,  H03F3/45946 ,  H03F2203/45512 ,  H03F2203/45528 ,  H03F2203/45534 ,  H03F2203/45594 ,  H03F2203/45601 ,  H03F2203/45616

摘要： An amplifier includes a PWM converter that carries out pulse width modulation on differential input signals to generate differential PWM signals by comparing the differential input signals with sawtooth or triangular reference signal, and a power amplifier that carries out power amplification of the differential PWM signals to generate differential output signals. The power amplifier has a driver that drives a load with differential driving signals, a controller that sets a dead time in the differential driving signals to prevent current flow between power supply and ground terminals of the driver circuit, and a pre-delay compensator that generates the differential driving signals based on the differential PWM signals and sends the differential driving signals to the controller. The differential driving signals generated by the pre-delay compensator includes a pulse width for compensating for the dead time that is to be set in the differential driving signals by the controller.

摘要翻译： 放大器包括PWM转换器，其通过差分输入信号与锯齿波或三角参考信号进行比较来对差分输入信号进行脉宽调制以产生差分PWM信号;以及功率放大器，其执行差分PWM信号的功率放大以产生 差分输出信号。 功率放大器具有驱动具有差分驱动信号的负载的驱动器，控制器，其设置差分驱动信号中的死区时间，以防止驱动电路的电源和接地端之间的电流流动;以及产生 基于差分PWM信号的差分驱动信号，并将差分驱动信号发送到控制器。 由预延迟补偿器产生的差分驱动信号包括用于补偿由控制器在差分驱动信号中设置的死区时间的脉冲宽度。

公开(公告)号：US6166671A

公开(公告)日：2000-12-26

申请号：US160541

申请日：1998-09-25

申请人： Nobutaka Kitagawa ,  Yoshikazu Nagashima

发明人： Nobutaka Kitagawa ,  Yoshikazu Nagashima

IPC分类号： H03M1/38 ,  H03M1/06 ,  H03M1/12 ,  H03M1/66 ,  H03M1/84 ,  H03M1/88

CPC分类号： H03M1/0624 ,  H03M1/12

摘要： The analog-to-digital converting circuit apparatus of the invention is intended to realize both low voltage operation and high speed operation of an analog-to-digital converting circuit without impairing the precision characteristic. In plural boosting circuits, voltages higher than each supply voltage are generated. These plural boosting circuits are controlled as the control timing is sequentially shifted by the controller. The boosted voltages delivered from the plural boosting circuits are accumulated in the capacitor, and supplied into the analog-to-digital converter. In the analog-to-digital converter, at the timing other than the changeover timing of the converting action of the analog-to-digital converter, the plural boosting circuits are changed over sequentially, and the boosted voltages are converted from analog to digital values.

摘要翻译： 本发明的模拟 - 数字转换电路装置旨在实现模数转换电路的低电压操作和高速操作，而不损害精度特性。 在多个升压电路中，产生高于每个电源电压的电压。 当控制器依次移动控制定时时，控制这些多个升压电路。 从多个升压电路输出的升压电压累积在电容器中，并被提供给模数转换器。 在模数转换器中，在模数转换器的转换动作的转换定时之外的定时，多个升压电路依次改变，升压后的电压从模数转换为数字值 。

公开(公告)号：US6097228A

公开(公告)日：2000-08-01

申请号：US120115

申请日：1998-07-22

申请人： Isao Fujisawa ,  Yoshikazu Nagashima ,  Nobutaka Kitagawa

发明人： Isao Fujisawa ,  Yoshikazu Nagashima ,  Nobutaka Kitagawa

IPC分类号： H03K5/1252 ,  G06F1/24 ,  H03K3/02

CPC分类号： G06F1/24

摘要： A semiconductor integrated circuit device includes an MCU, reset circuit and reset input circuit. The reset circuit resets the MCU in response to a reset signal input to a reset terminal. The reset input circuit eliminates an electromagnetic disturbance noise input to the reset terminal, permits only a signal having an effective pulse width to pass therethrough, forms an internal reset signal of a pulse width required for the reset operation according to the signal, and supplies the same to the reset circuit. The reset input circuit includes an analog delay circuit, delay latch group, effective pulse width detection circuit and waveform forming circuit. The analog delay circuit eliminates a noise of a period shorter than the effective pulse width from the reset signal. The delay latch group sequentially samples an output signal of the analog delay circuit. The effective pulse width detection circuit determines whether or not the reset signal has an effective pulse width in response to an output signal of the delay latch group. The waveform forming circuit receives an output signal of the effective pulse width detection circuit, and when it is detected that the reset signal has the effective pulse width, it forms an internal reset signal having a necessary pulse width from the reset signal.

摘要翻译： 半导体集成电路器件包括MCU，复位电路和复位输入电路。 复位电路响应于复位信号输入复位端复位MCU。 复位输入电路消除输入到复位端子的电磁干扰噪声，仅允许有效脉冲宽度的信号通过，根据该信号形成复位操作所需的脉冲宽度的内部复位信号， 与复位电路相同。 复位输入电路包括模拟延迟电路，延迟锁存器组，有效脉宽检测电路和波形形成电路。 模拟延迟电路消除了比复位信号有效脉冲宽度短的周期噪声。 延迟锁存器组对模拟延迟电路的输出信号进行顺序采样。 有效脉冲宽度检测电路根据延迟锁存器组的输出信号来确定复位信号是否具有有效脉冲宽度。 波形形成电路接收有效脉冲宽度检测电路的输出信号，当检测到复位信号具有有效脉冲宽度时，从复位信号形成具有必要脉冲宽度的内部复位信号。

公开(公告)号：US08847677B2

公开(公告)日：2014-09-30

申请号：US13607523

申请日：2012-09-07

申请人： Yoshikazu Nagashima

发明人： Yoshikazu Nagashima

IPC分类号： H03F1/02

CPC分类号： H03F3/45475 ,  H03F3/217 ,  H03F3/45946 ,  H03F2203/45048 ,  H03F2203/45512 ,  H03F2203/45528 ,  H03F2203/45534 ,  H03F2203/45594 ,  H03F2203/45601 ,  H03F2203/45616

摘要： According to one embodiment, an amplification circuit can be switched between amplifying and calibration modes. During calibration, a preamplifier amplifies a differential input signal and generates a differential output signal. The amplifier circuit includes an input switch unit which sets a differential input signal as the reference voltage signal of the same voltage level at the time of calibration, a PWM conversion unit which carries out Pulse-Width-Modulation of the differential output signal, and generates a differential PWM signal based on the result of comparing the differential output signal with the reference signal, a calibration unit which generates an offset adjustment signal according to the phase difference of differential PWM signals, and an electric amplifier which carries out electric power amplification of the differential PWM signal and generates the differential final output signal.

摘要翻译： 根据一个实施例，可以在放大和校准模式之间切换放大电路。 在校准期间，前置放​​大器放大差分输入信号并产生差分输出信号。 放大电路包括：输入开关单元，其将校准时的差分输入信号设定为相同电压电平的基准电压信号; PWM变换单元，进行差分输出信号的脉宽调制，并生成 基于将差分输出信号与参考信号进行比较的结果的差分PWM信号，根据差分PWM信号的相位差产生偏移调整信号的校准单元，以及进行电力放大的电放大器 差分PWM信号并产生差分最终输出信号。

公开(公告)号：US07830295B2

公开(公告)日：2010-11-09

申请号：US12427495

申请日：2009-04-21

申请人： Shinichi Ikeda ,  Hirotomo Ishii ,  Yoshikazu Nagashima

发明人： Shinichi Ikeda ,  Hirotomo Ishii ,  Yoshikazu Nagashima

IPC分类号： H03M1/12

CPC分类号： H03K5/2472 ,  H03M1/0678 ,  H03M1/468

摘要： In an A/D converter, three capacitors are connected to a comparator. The A/D converter also includes three switching circuits that each input a first reference voltage, a second reference voltage, and a third reference voltage in the three capacitors. A control circuit selects at least two of the three switching circuits during a charging period of stray capacitance of each of the capacitors. The control circuit turns on one of the switching devices in the selected switching circuits simultaneously, and during a comparing period by the comparator, selects one of the three capacitors for each comparison, and selects another capacitor in the next comparison.

摘要翻译： 在A / D转换器中，三个电容连接到比较器。 A / D转换器还包括三个开关电路，每个开关电路在三个电容器中输入第一参考电压，第二参考电压和第三参考电压。 在每个电容器的寄生电容的充电期间，控制电路选择三个开关电路中的至少两个。 控制电路同时接通选择的开关电路中的一个开关器件，并且在比较器的比较期间，为每个比较选择三个电容器中的一个，并在下一个比较中选择另一个电容器。

公开(公告)号：US20090226007A1

公开(公告)日：2009-09-10

申请号：US12400818

申请日：2009-03-10

申请人： Yoshikazu Nagashima

发明人： Yoshikazu Nagashima

IPC分类号： H04B15/00

CPC分类号： H03G3/348

摘要： A mute circuit has a resistor net configured to include a plurality of resistors connected in cascade between two reference voltage terminals, the resistor net being capable of outputting one of divided voltages from between the adjacent resistors, a selecting circuit configured to control selection of the divided voltage outputted from the resistor net based on logic of a selecting signal, a signal propagation determining circuit configured to monitor a voltage level of the divided voltage selected by the selecting circuit using an alternating test signal, and determine whether a signal indicating the monitored result propagates or not at the same cycle as that of the test signal, a memory circuit configured to store data corresponding to an output signal of the signal propagation determining circuit in association with the selecting signal, a first switching circuit configured to switch whether a DC blocking capacitor is charged or not according to the divided voltage outputted from between specific resistors in the resistor net, a second switching circuit configured to switch whether different reference voltages or the same reference voltages is applied to the two reference voltage terminals, and a switch controlling circuit configured to shut off a charge path to the DC blocking capacitor until a result of determination by the signal propagation determining circuit is obtained, select the divided voltage by the selecting circuit based on the data stored in the memory circuit and charge the DC blocking capacitor by switching the first switching circuit after the result of determination by the signal propagation determining circuit has been obtained, and stop charging the DC blocking capacitor by switching the first switching circuit after the output signal of the signal propagation determining circuit becomes steady.

摘要翻译： 静音电路具有电阻网，其被配置为包括串联连接在两个参考电压端子之间的多个电阻器，所述电阻器网能够从所述相邻电阻器之间输出分压电压中的一个;选择电路，被配置为控制所划分的 基于选择信号的逻辑从电阻网输出的电压;信号传播判定电路，被配置为使用交替测试信号监视由选择电路选择的分压电压的电压电平，并且确定指示监视结果的信号是否传播 或者不与测试信号的周期相同的周期;存储电路，被配置为存储与选择信号相关联的与信号传播判定电路的输出信号相对应的数据;第一开关电路，被配置为切换直流阻塞电容器 根据从其输出的分压进行充电 在所述电阻网中的特定电阻器之间，配置为切换是否对所述两个参考电压端子施加不同的参考电压或相同参考电压的第二开关电路，以及用于切断到所述隔直流电容器的充电路径的开关控制电路 直到得到由信号传播判定电路确定的结果为止，通过选择电路根据存储在存储电路中的数据选择分压，并通过在确定结果之后切换第一开关电路对直流隔离电容器进行充电 已经获得信号传播确定电路，并且在信号传播确定电路的输出信号变得稳定之后，通过切换第一开关电路来停止对隔直电容器充电。

公开(公告)号：US06304208B1

公开(公告)日：2001-10-16

申请号：US09487179

申请日：2000-01-19

申请人： Yoshikazu Nagashima

发明人： Yoshikazu Nagashima

IPC分类号： H03M100

CPC分类号： H03M1/0607 ,  H03M1/46

摘要： There is provided a successive approximation A/D converter circuit for correcting an error generated in an A/D conversion code due to parasitic resistance of a D/A conversion circuit, on a semiconductor chip. A switch for performing a switching operation between a sampling period and a comparing period, and first and second level shift circuits constituted of a plurality of condensers, are provided between a D/A conversion circuit and a voltage comparing circuit. The first level shift circuit applies a voltage for correcting a voltage drop due to the parasitic resistance of the D/A conversion circuit to the plurality of condensers to evenly correct the errors generated in the D/A conversion voltage independently of the D/A conversion code. The second level shift circuit applies a voltage for correcting a voltage drop due to the parasitic resistance of the D/A conversion circuit to the plurality of condensers to perform an offset full-scale correction for correcting the errors generated in the D/A conversion voltage per bit of the D/A conversion code in a successive comparing process. It is possible to correct the error generated in the A/D conversion code on the semiconductor chip by combining the offset correction using the first and second level shift circuits and the offset full-scale correction.

摘要翻译： 提供了在半导体芯片上用于校正由于D / A转换电路的寄生电阻而在A / D转换代码中产生的误差的逐次逼近A / D转换电路。 在D / A转换电路和电压比较电路之间设置用于在采样周期和比较周期之间执行开关操作的开关以及由多个电容器构成的第一和第二电平移位电路。 第一级移位电路施加用于校正由于D / A转换电路的寄生电阻到多个电容器的电压降的电压，以均匀地校正D / A转换电压中产生的误差，而与D / A转换无关 码。 第二电平移位电路施加用于校正由于D / A转换电路的寄生电阻到多个电容器的电压降的电压，以执行用于校正在D / A转换电压中产生的误差的偏移满量程校正 每个比特的D / A转换码在连续的比较过程中。 通过组合使用第一和第二电平移位电路的偏移校正和偏移满量程校正，可以校正半导体芯片上的A / D转换代码中产生的误差。

公开(公告)号：US06594129B1

公开(公告)日：2003-07-15

申请号：US09667778

申请日：2000-09-22

申请人： Akira Baba ,  Yoshikazu Nagashima ,  Kazuto Sugiyama ,  Yoshihiko Mine

发明人： Akira Baba ,  Yoshikazu Nagashima ,  Kazuto Sugiyama ,  Yoshihiko Mine

IPC分类号： H02H318

CPC分类号： H03K17/0822 ,  H03K2017/0806 ,  H03K2217/0081

摘要： In a semiconductor relay system for supply a power source to a lamp load under the on/off control by a microcomputer using a semiconductor relay, a method of cutting off a circuit under an overcurrent, a first prescribed value is which is a current value higher than a rated load current for the load and a maximum current value supplied to the lamp load, and a second prescribed value is set which is a current value between said first prescribed value and said rated current value; the current value flowing through the lamp load is sampled at predetermined time intervals and comparing the current value thus sampled with the second prescribed value; and when a higher current than said first prescribed value flows through the lamp load, the current supplied to the lamp load is controlled within a prescribed range between said first prescribed value and said second prescribed value, and when the sampled current value higher that said second prescribed value is counted by a prescribed number of times, the sampled current is decided as an overcurrent thereby cutting off the semiconductor relay to stop the current supply to said lamp load.

摘要翻译： 在半导体继电器系统中，通过使用半导体继电器的微型计算机在开/关控制下向灯负载提供电源，在过电流下切断电路的方法，第一规定值为电流值更高 比负载的额定负载电流和提供给灯负载的最大电流值，并且设定作为所述第一规定值和所述额定电流值之间的电流值的第二规定值; 以预定的时间间隔对流过灯负载的电流值进行采样，并将由此采样的电流值与第二规定值进行比较; 并且当比所述第一规定值高的电流流经灯负载时，提供给灯负载的电流被控制在所述第一规定值和所述第二规定值之间的规定范围内，并且当所述第二规定值 将规定值计数规定次数，将采样电流判定为过电流，从而切断半导体继电器，停止对所述灯负载的电流供给。

公开(公告)号：US5757086A

公开(公告)日：1998-05-26

申请号：US692134

申请日：1996-08-05

申请人： Yoshikazu Nagashima

发明人： Yoshikazu Nagashima

IPC分类号： B60R25/04 ,  B60R25/042 ,  B60R25/045 ,  B60R25/06 ,  B60R25/24 ,  F02N11/08 ,  F02N15/00

CPC分类号： F02N11/0807

摘要： A remote starter starts a driving mechanism in a vehicle from the outside through a command signal from a transmitter. A remote start releaser releases a remote drive state of the driving mechanism and converts it to an ordinary driving state. The presence of an operation to mechanisms in the vehicle is detected. The driving mechanism is stopped when the driving mechanism is in the remote drive state and the presence of an operation to mechanisms is detected. The theft of a vacant vehicle is thereby prevented.

摘要翻译： 遥控起动器通过来自发射机的命令信号从外部从车辆起动驾驶机构。 远程启动释放器释放驱动机构的远程驱动状态并将其转换为普通驱动状态。 检测到对车辆中的机构的操作的存在。 当驱动机构处于远程驱动状态并且检测到对机构的操作的存在时，驱动机构停止。 因此防止了空车辆的盗窃。