公开(公告)号：US20120273778A1

公开(公告)日：2012-11-01

申请号：US13546013

申请日：2012-07-11

申请人： Yoshinobu ASAMI ,  Tamae TAKANO ,  Masayuki SAKAKURA ,  Ryoji NOMURA ,  Shunpei YAMAZAKI

发明人： Yoshinobu ASAMI ,  Tamae TAKANO ,  Masayuki SAKAKURA ,  Ryoji NOMURA ,  Shunpei YAMAZAKI

IPC分类号： H01L29/12

CPC分类号： H01L27/1082 ,  B82Y10/00 ,  G11C11/34 ,  G11C13/0014 ,  G11C2213/79 ,  H01L23/4828 ,  H01L27/105 ,  H01L27/1203 ,  H01L27/1244 ,  H01L27/28 ,  H01L29/458 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element.

摘要翻译： 可以在没有接触的情况下发送和接收数据的半导体器件部分地受到一些铁路通行证，电子货币卡等的普及; 然而，提供便宜的半导体器件以进一步普及是主要的任务。 鉴于上述现有条件，本发明的半导体器件包括具有用于提供便宜的半导体器件的简单结构的存储器及其制造方法。 包括在存储器中的存储元件包括含有有机化合物的层，并且将设置在存储元件部分中的TFT的源电极或漏电极用作形成存储元件的位线的导电层。

公开(公告)号：US20100149851A1

公开(公告)日：2010-06-17

申请号：US12711333

申请日：2010-02-24

申请人： Yoshinobu ASAMI ,  Tamae TAKANO ,  Masayuki SAKAKURA ,  Ryoji NOMURA ,  Shunpei YAMAZAKI

发明人： Yoshinobu ASAMI ,  Tamae TAKANO ,  Masayuki SAKAKURA ,  Ryoji NOMURA ,  Shunpei YAMAZAKI

IPC分类号： G11C5/06 ,  G11C8/08

CPC分类号： H01L27/1082 ,  B82Y10/00 ,  G11C11/34 ,  G11C13/0014 ,  G11C2213/79 ,  H01L23/4828 ,  H01L27/105 ,  H01L27/1203 ,  H01L27/1244 ,  H01L27/28 ,  H01L29/458 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device that can transmit and receive data without contact is popular partly as some railway passes, electronic money cards, and the like; however, it has been a prime task to provide an inexpensive semiconductor device for further popularization. In view of the above current conditions, a semiconductor device of the present invention includes a memory with a simple structure for providing an inexpensive semiconductor device and a manufacturing method thereof. A memory element included in the memory includes a layer containing an organic compound, and a source electrode or a drain electrode of a TFT provided in the memory element portion is used as a conductive layer which forms a bit line of the memory element.

摘要翻译： 可以在没有接触的情况下发送和接收数据的半导体器件部分地受到一些铁路通行证，电子货币卡等的普及; 然而，提供便宜的半导体器件以进一步普及是主要的任务。 鉴于上述现有条件，本发明的半导体器件包括具有用于提供便宜的半导体器件的简单结构的存储器及其制造方法。 包括在存储器中的存储元件包括含有有机化合物的层，并且将设置在存储元件部分中的TFT的源电极或漏电极用作形成存储元件的位线的导电层。

公开(公告)号：US20100055896A1

公开(公告)日：2010-03-04

申请号：US12618161

申请日：2009-11-13

申请人： Hiroko ABE ,  Mikio YUKAWA ,  Tamae TAKANO ,  Yoshinobu ASAMI ,  Kiyoshi KATO ,  Ryoji NOMURA ,  Yoshitaka MORIYA

发明人： Hiroko ABE ,  Mikio YUKAWA ,  Tamae TAKANO ,  Yoshinobu ASAMI ,  Kiyoshi KATO ,  Ryoji NOMURA ,  Yoshitaka MORIYA

IPC分类号： H01L21/3205

CPC分类号： H01L27/1266 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/04 ,  H01L27/12 ,  H01L27/1285 ,  H01L27/1292 ,  H01L27/13 ,  H01L27/283 ,  H01L51/0059

摘要： It is an object of the present invention to provide a volatile organic memory in which data can be written other than during manufacturing and falsification by rewriting can be prevented, and to provide a semiconductor device including such an organic memory. It is a feature of the invention that a semiconductor device includes a plurality of bit lines extending in a first direction; a plurality of word lines extending in a second direction different from the first direction; a memory cell array including a plurality of memory cells each provided at one of intersections of the bit lines and the word lines; and memory elements provided in the memory cells, wherein the memory elements include bit lines, an organic compound layer, and the word lines, and the organic compound layer includes a layer in which an inorganic compound and an organic compound are mixed.

摘要翻译： 本发明的一个目的是提供一种挥发性有机存储器，其中除了在制造期间可以写入数据，并且可以防止通过改写伪造，并提供包括这种有机存储器的半导体器件。 本发明的特征在于，半导体器件包括沿第一方向延伸的多个位线; 沿与第一方向不同的第二方向延伸的多个字线; 存储单元阵列，包括多个存储单元，每个存储单元分别设置在位线和字线的交点之一处; 以及设置在存储单元中的存储元件，其中存储元件包括位线，有机化合物层和字线，有机化合物层包括混合有无机化合物和有机化合物的层。

公开(公告)号：US20120108029A1

公开(公告)日：2012-05-03

申请号：US13295304

申请日：2011-11-14

申请人： Mikio YUKAWA ,  Nobuharu OHSAWA ,  Ryoji NOMURA ,  Yoshinobu ASAMI

发明人： Mikio YUKAWA ,  Nobuharu OHSAWA ,  Ryoji NOMURA ,  Yoshinobu ASAMI

IPC分类号： H01L21/02

CPC分类号： G11C13/0014 ,  B82Y10/00 ,  G11C2213/77 ,  G11C2213/79 ,  H01L27/285 ,  H01L51/0591

摘要： It is an object of the present invention to provide a technique in which a high-performance and high reliable memory device and a semiconductor device provided with the memory device are manufactured at low cost with high yield. The semiconductor device includes an organic compound layer including an insulator over a first conductive layer and a second conductive layer over the organic compound layer including an insulator. Further, the semiconductor device is manufactured by forming a first conductive layer, discharging a composition of an insulator and an organic compound over the first conductive layer to form an organic compound layer including an insulator, and forming a second conductive layer over the organic compound layer including an insulator.

摘要翻译： 本发明的一个目的是提供一种以高成本低成本制造高性能且高可靠性的存储器件和设置有存储器件的半导体器件的技术。 半导体器件包括在第一导电层上包括绝缘体的有机化合物层和包含绝缘体的有机化合物层上的第二导电层。 此外，半导体器件通过在第一导电层上形成第一导电层，排出绝缘体和有机化合物的组合物而形成包含绝缘体的有机化合物层，并在有机化合物层上形成第二导电层来制造 包括绝缘体。

公开(公告)号：US20120217566A1

公开(公告)日：2012-08-30

申请号：US13468412

申请日：2012-05-10

申请人： Yoshinobu ASAMI

发明人： Yoshinobu ASAMI

IPC分类号： H01L29/788

CPC分类号： H01L29/7881 ,  G11C16/0441 ,  H01L27/11521 ,  H01L27/1214 ,  H01L29/66825

摘要： An object is to suppress reading error even in the case where writing and erasing are repeatedly performed. Further, another object is to reduce writing voltage and erasing voltage while increase in the area of a memory transistor is suppressed. A floating gate and a control gate are provided with an insulating film interposed therebetween over a first semiconductor layer for writing operation and erasing operation and a second semiconductor layer for reading operation which are provided over a substrate; injection and release of electrons to and from the floating gate are performed using the first semiconductor layer; and reading is performed using the second semiconductor layer.

摘要翻译： 即使在重复执行写入和擦除的情况下，也是抑制读取错误的目的。 此外，另一个目的是降低写入电压和擦除电压，同时抑制存储晶体管的面积增加。 浮置栅极和控制栅极在其上方设置有用于写入操作和擦除操作的第一半导体层和设置在基板上的用于读取操作的第二半导体层之间的绝缘膜; 使用第一半导体层进行向浮栅的注入和释放电子; 并且使用第二半导体层执行读取。

公开(公告)号：US20110227139A1

公开(公告)日：2011-09-22

申请号：US13113255

申请日：2011-05-23

申请人： Tetsuya KAKEHATA ,  Tetsuhiro TANAKA ,  Yoshinobu ASAMI

发明人： Tetsuya KAKEHATA ,  Tetsuhiro TANAKA ,  Yoshinobu ASAMI

IPC分类号： H01L29/788 ,  H01L29/772 ,  H01L29/06

CPC分类号： H01L27/1214 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31637 ,  H01L21/31645 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/4908 ,  H01L29/66825 ,  H01L29/78603 ,  H01L29/7881

摘要： An object is to provide a technique to manufacture an insulating film having excellent film characteristics. In particular, an object is to provide a technique to manufacture a dense insulating film with a high withstand voltage. Moreover, an object is to provide a technique to manufacture an insulating film with few electron traps. An insulating film including oxygen is subjected to plasma treatment using a high frequency under the conditions where the electron density is 1×1011 cm−3 or more and the electron temperature is 1.5 eV or less in an atmosphere including oxygen.

摘要翻译： 本发明的目的是提供一种制造具有优异膜特性的绝缘膜的技术。 具体地，目的在于提供一种制造具有高耐压的致密绝缘膜的技术。 此外，目的是提供一种制造具有少量电子阱的绝缘膜的技术。 在包含氧气的气氛中，在电子密度为1×10 11 cm -3以上，电子温度为1.5eV以下的条件下，使用高频率对包含氧的绝缘膜进行等离子体处理。

公开(公告)号：US20110210412A1

公开(公告)日：2011-09-01

申请号：US13103293

申请日：2011-05-09

申请人： Mikio YUKAWA ,  Nobuharu OHSAWA ,  Yoshinobu ASAMI

发明人： Mikio YUKAWA ,  Nobuharu OHSAWA ,  Yoshinobu ASAMI

IPC分类号： H01L29/66

CPC分类号： H01L27/1255 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/0069 ,  G11C2013/009 ,  G11C2213/77 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/105 ,  H01L27/112 ,  H01L27/11206 ,  H01L27/11286 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/13 ,  H01L27/285 ,  H01L51/0042 ,  H01L51/0051 ,  H01L51/0059 ,  H01L51/0081 ,  H01L51/0533

摘要： On object of the invention is to provide a nonvolatile memory device, in which data can be added to the memory device after a manufacturing process and forgery and the like by rewriting can be prevented, and a semiconductor device including the memory device. Another object of the invention is to provide a highly-reliable, inexpensive, and nonvolatile memory device and a semiconductor device including the memory device. A memory element includes a first conductive layer, a second conductive layer, a first insulating layer with a thickness of 0.1 nm or more and 4 nm or less being in contact with the first conductive layer, and an organic compound layer interposed between the first conductive layer, the first insulating layer, and the second conductive layer.

摘要翻译： 本发明的目的是提供一种非易失性存储器件，其中可以通过重写来制造处理和伪造等以及包括存储器件的半导体器件，可以将数据添加到存储器件。 本发明的另一个目的是提供一种高度可靠，便宜且非易失性的存储器件和包括存储器件的半导体器件。 存储元件包括第一导电层，第二导电层，与第一导电层接触的厚度为0.1nm以上且4nm以下的第一绝缘层，以及介于第一导电层之间的有机化合物层 层，第一绝缘层和第二导电层。

公开(公告)号：US20090283812A1

公开(公告)日：2009-11-19

申请号：US12436580

申请日：2009-05-06

申请人： Yoshinobu ASAMI

发明人： Yoshinobu ASAMI

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L29/7881 ,  G11C16/0441 ,  H01L27/11521 ,  H01L27/1214 ,  H01L29/66825

摘要： An object is to suppress reading error even in the case where writing and erasing are repeatedly performed. Further, another object is to reduce writing voltage and erasing voltage while increase in the area of a memory transistor is suppressed. A floating gate and a control gate are provided with an insulating film interposed therebetween over a first semiconductor layer for writing operation and erasing operation and a second semiconductor layer for reading operation which are provided over a substrate; injection and release of electrons to and from the floating gate are performed using the first semiconductor layer; and reading is performed using the second semiconductor layer.

摘要翻译： 即使在重复执行写入和擦除的情况下，也是抑制读取错误的目的。 此外，另一个目的是降低写入电压和擦除电压，同时抑制存储晶体管的面积增加。 浮置栅极和控制栅极在其上方设置有用于写入操作和擦除操作的第一半导体层和设置在基板上的用于读取操作的第二半导体层之间的绝缘膜; 使用第一半导体层进行向浮栅的注入和释放电子; 并且使用第二半导体层执行读取。

公开(公告)号：US20100213531A1

公开(公告)日：2010-08-26

申请号：US12699938

申请日：2010-02-04

申请人： Yoshinobu ASAMI ,  Manabu SATO

发明人： Yoshinobu ASAMI ,  Manabu SATO

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L27/11521 ,  H01L21/84 ,  H01L27/0207 ,  H01L27/11519 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/1266

摘要： A nonvolatile memory element which is provided with a floating gate electrode and a high withstand voltage transistor which is provided with a thick gate insulating film are formed over one substrate without increase in a driving voltage of the nonvolatile memory element. A stacked film of a first insulating film and a second insulating film is formed between an island-like semiconductor region and a floating gate electrode of the nonvolatile memory element and between an island-like semiconductor region and a gate electrode of the transistor. The first insulating film overlapping with the floating gate electrode is removed, and the insulating film between the island-like semiconductor region and the floating gate electrode is formed thinner than the gate insulating film of the transistor. The transistor includes a conductive film which is formed in the same layer as the floating gate electrode and a conductive film which is formed in the same layer as a control gate electrode, and these two conductive films are electrically connected to each other and function as the gate electrodes of the transistor.

摘要翻译： 在不增加非易失性存储元件的驱动电压的情况下，在一个衬底上形成设置有浮栅电极和设置有厚栅极绝缘膜的高耐压晶体管的非易失性存储元件。 第一绝缘膜和第二绝缘膜的层叠膜形成在非易失性存储元件的岛状半导体区域和浮栅之间以及晶体管的岛状半导体区域和栅电极之间。 去除与浮栅电极重叠的第一绝缘膜，并且形成岛状半导体区域和浮置栅电极之间的绝缘膜比晶体管的栅极绝缘膜更薄。 晶体管包括形成在与浮置栅电极相同的层中的导电膜和与控制栅电极形成在同一层中的导电膜，并且这两个导电膜彼此电连接并用作 晶体管的栅电极。

公开(公告)号：US20080203454A1

公开(公告)日：2008-08-28

申请号：US12026676

申请日：2008-02-06

申请人： Yoshinobu ASAMI

发明人： Yoshinobu ASAMI

IPC分类号： H01L27/12 ,  H01L21/84

CPC分类号： H01L27/1288 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11531 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13

摘要： To provide a semiconductor device having a memory element, and which is manufactured by a simplified manufacturing process. A method of manufacturing a semiconductor device includes, forming a first insulating film to cover a first semiconductor film and a second semiconductor film; forming a first conductive film and a second conductive film over the first semiconductor film and the second semiconductor film, respectively, with the first insulating film interposed therebetween; forming a second insulating film to cover the first conductive film; forming a third conductive film selectively over the first conductive film which is formed over the first semiconductor film, with the second insulating film interposed therebetween, and doping the first semiconductor film with an impurity element with the third conductive film serving as a mask and doping the second semiconductor film with the impurity element through the second conductive film.

摘要翻译： 提供具有存储元件的半导体器件，其通过简化的制造工艺制造。 一种制造半导体器件的方法包括：形成第一绝缘膜以覆盖第一半导体膜和第二半导体膜; 在所述第一半导体膜和所述第二半导体膜上分别在所述第一绝缘膜之间形成第一导电膜和第二导电膜; 形成第二绝缘膜以覆盖所述第一导电膜; 在形成在第一半导体膜上的第一导电膜上选择性地形成第三导电膜，其中介于第二绝缘膜之间，并且用第三导电膜作为掩模，用杂质元素掺杂第一半导体膜，并掺杂 具有通过第二导电膜的杂质元素的第二半导体膜。