公开(公告)号：US5040034A

公开(公告)日：1991-08-13

申请号：US465748

申请日：1990-01-18

申请人： Yoshinori Murakami ,  Teruyoshi Mihara ,  Tsutomu Matsushita ,  Kenji Yao ,  Norihiko Kiritani

发明人： Yoshinori Murakami ,  Teruyoshi Mihara ,  Tsutomu Matsushita ,  Kenji Yao ,  Norihiko Kiritani

IPC分类号： H01L29/78

CPC分类号： H01L29/7827 ,  H01L29/7839 ,  Y10S257/902

摘要： A semiconductor device includes a semiconductor substrate as a drain region. A metal source region is located on a first surface of the substrate. The metal and the substrate constitute a Schottky junction. An insulated gate, including a gate electrode and an insulating film surrounding the gate electrode, is adjacent to the Schottky junction, such that angle formed by the Schottky junction and the insulated gate in the substrate is an acute angle. A part of the Schottky metal can be buried in the form of a pillar in the substrate, and a channel region of the Schottky junction can be formed on the pillar near the insulated gate.

摘要翻译： 半导体器件包括作为漏极区域的半导体衬底。 金属源区位于基板的第一表面上。 金属和衬底构成肖特基结。 包括栅电极和围绕栅电极的绝缘膜的绝缘栅极与肖特基结相邻，使得由肖特基结和衬底中的绝缘栅极形成的角度是锐角。 肖特基金属的一部分可以以衬底的形式被埋入，并且可以在绝缘栅极附近的柱上形成肖特基结的沟道区。

公开(公告)号：US20080098973A1

公开(公告)日：2008-05-01

申请号：US11815201

申请日：2006-03-17

申请人： Yusuke Niwa ,  Kenjiro Matsushita ,  Teruyoshi Mihara ,  Kohji Masuda ,  Hiroyuki Kaneko ,  Norihiko Kiritani

发明人： Yusuke Niwa ,  Kenjiro Matsushita ,  Teruyoshi Mihara ,  Kohji Masuda ,  Hiroyuki Kaneko ,  Norihiko Kiritani

IPC分类号： F02P23/04

CPC分类号： F02P23/02 ,  F02P23/04

摘要： The disclosure relates to a photoconductive ignition system including a photoconductor configured to contact an oxidant-fuel gas mixture, and a light source providing irradiating light to a surface of the photoconductor. The photoconductor absorbs at least some of the light from the light source, which causes a variation in electrical potential at the surface of the photoconductor, thereby igniting the oxidant-fuel gas mixture. The disclosure further relates to a method of activating an oxidant-fuel gas mixture by exposing a photoconductor surface to the gas mixture and irradiating the surface with a light source emitting light at a wavelength corresponding to an energy level greater than a band gap energy level of the photoconductor, thereby activating the gas mixture in a combustion reaction.

摘要翻译： 本发明涉及一种光导点火系统，其包括配置成接触氧化剂 - 燃料气体混合物的光电导体和向感光体表面提供照射光的光源。 光电导体吸收来自光源的至少一些光，这导致光电导体表面的电位变化，从而点燃氧化剂 - 燃料气体混合物。 本公开还涉及一种通过将光电导体表面暴露于气体混合物并用发射光的光源照射氧化剂 - 燃料气体混合物的方法，所述光源以对应于大于等于 光电导体，从而在燃烧反应中激活气体混合物。

公开(公告)号：US09136400B2

公开(公告)日：2015-09-15

申请号：US12934199

申请日：2009-02-27

申请人： Satoshi Tanimoto ,  Norihiko Kiritani ,  Toshiharu Makino ,  Masahiko Ogura ,  Norio Tokuda ,  Hiromitsu Kato ,  Hideyo Okushi ,  Satoshi Yamasaki

发明人： Satoshi Tanimoto ,  Norihiko Kiritani ,  Toshiharu Makino ,  Masahiko Ogura ,  Norio Tokuda ,  Hiromitsu Kato ,  Hideyo Okushi ,  Satoshi Yamasaki

IPC分类号： H01L21/00 ,  H01L29/861 ,  H01L29/16 ,  H01L29/20 ,  H01L29/22 ,  H01L29/45 ,  H01L29/47 ,  H01L29/872

CPC分类号： H01L29/861 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/22 ,  H01L29/45 ,  H01L29/452 ,  H01L29/456 ,  H01L29/47 ,  H01L29/475 ,  H01L29/872

摘要： In this junction element 1, when a forward voltage is applied, a depletion layer is formed in a semiconductor layer 2, prohibiting electrons present in an electrode layer 4 to move into the semiconductor layer 2. For this reason, a majority of holes in a semiconductor layer 3 do not disappear by recombination with conduction electrons in the semiconductor layer 2, but reach the electrode layer 4 while diffusing into the semiconductor layer 2. Accordingly, the junction element 1 can serve as a good conductor for holes, while avoiding the influence of a resistance value, and allows a current to flow therethrough at a level equal to or more than that achieved by a semiconductor element formed of a Si or SiC semiconductor. The present invention is applicable to any semiconductor material in which at least one of a donor level and an acceptor level is located at a sufficiently deep position beyond a thermal excitation energy at an operating temperature, such as diamond, zinc oxide (ZnO), aluminum nitride (AlN), or boron nitride (BN). The present invention is also applicable to even a material having a shallow impurity level at room temperature, such as silicon (Si), silicon carbide (SiC), gallium nitride (GaN), gallium arsenide (GaAs), or germanium (Ge), as long as operation is performed at such a low temperature that the thermal excitation energy can be sufficiently small.

摘要翻译： 在该接合元件1中，当施加正向电压时，在半导体层2中形成耗尽层，禁止存在于电极层4中的电子移动到半导体层2中。因此，大部分孔 半导体层3不会通过与半导体层2中的导电电子的复合而消失，而是在扩散到半导体层2中的同时到达电极层4.因此，接合元件1可以用作孔的良导体，同时避免影响 的电阻值，并且允许电流以等于或大于由Si或SiC半导体形成的半导体元件实现的电平流过。 本发明可应用于任何半导体材料，其中施主电平和受主电平中的至少一个位于超过工作温度下的热激发能的足够深的位置，例如金刚石，氧化锌（ZnO），铝 氮化物（AlN）或氮化硼（BN）。 本发明甚至也可应用于诸如硅（Si），碳化硅（SiC），氮化镓（GaN），砷化镓（GaAs）或锗（Ge）等室温下具有浅杂质水平的材料， 只要在如此低的温度下进行操作即可使热激发能足够小。

公开(公告)号：US20110017991A1

公开(公告)日：2011-01-27

申请号：US12934199

申请日：2009-02-27

申请人： Satoshi Tanimoto ,  Norihiko Kiritani ,  Toshiharu Makino ,  Masahiko Ogura ,  Norio Tokuda ,  Hiromitsu Kato ,  Hideyo Okushi ,  Satoshi Yamasaki

发明人： Satoshi Tanimoto ,  Norihiko Kiritani ,  Toshiharu Makino ,  Masahiko Ogura ,  Norio Tokuda ,  Hiromitsu Kato ,  Hideyo Okushi ,  Satoshi Yamasaki

IPC分类号： H01L29/12 ,  H01L29/06 ,  H01L29/22 ,  H01L29/16 ,  H01L29/24 ,  H01L29/20

CPC分类号： H01L29/861 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/22 ,  H01L29/45 ,  H01L29/452 ,  H01L29/456 ,  H01L29/47 ,  H01L29/475 ,  H01L29/872

摘要： In this junction element 1, when a forward voltage is applied, a depletion layer is formed in a semiconductor layer 2, prohibiting electrons present in an electrode layer 4 to move into the semiconductor layer 2. For this reason, a majority of holes in a semiconductor layer 3 do not disappear by recombination with conduction electrons in the semiconductor layer 2, but reach the electrode layer 4 while diffusing into the semiconductor layer 2. Accordingly, the junction element 1 can serve as a good conductor for holes, while avoiding the influence of a resistance value, and allows a current to flow therethrough at a level equal to or more than that achieved by a semiconductor element formed of a Si or SiC semiconductor. The present invention is applicable to any semiconductor material in which at least one of a donor level and an acceptor level is located at a sufficiently deep position beyond a thermal excitation energy at an operating temperature, such as diamond, zinc oxide (ZnO), aluminum nitride (AlN), or boron nitride (BN). The present invention is also applicable to even a material having a shallow impurity level at room temperature, such as silicon (Si), silicon carbide (SiC), gallium nitride (GaN), gallium arsenide (GaAs), or germanium (Ge), as long as operation is performed at such a low temperature that the thermal excitation energy can be sufficiently small.

摘要翻译： 在该接合元件1中，当施加正向电压时，在半导体层2中形成耗尽层，禁止存在于电极层4中的电子移动到半导体层2中。因此，大部分孔 半导体层3不会通过与半导体层2中的导电电子的复合而消失，而是在扩散到半导体层2中的同时到达电极层4.因此，接合元件1可以用作孔的良导体，同时避免影响 的电阻值，并且允许电流以等于或大于由Si或SiC半导体形成的半导体元件实现的电平流过。 本发明可应用于任何半导体材料，其中施主电平和受主电平中的至少一个位于超过工作温度下的热激发能的足够深的位置，例如金刚石，氧化锌（ZnO），铝 氮化物（AlN）或氮化硼（BN）。 本发明甚至也可应用于诸如硅（Si），碳化硅（SiC），氮化镓（GaN），砷化镓（GaAs）或锗（Ge）等室温下具有浅杂质水平的材料， 只要在如此低的温度下进行操作即可使热激发能足够小。

公开(公告)号：US20090289355A1

公开(公告)日：2009-11-26

申请号：US12091717

申请日：2006-09-22

申请人： Norihiko Kiritani ,  Satoshi Tanimoto ,  Kazuo Arai

发明人： Norihiko Kiritani ,  Satoshi Tanimoto ,  Kazuo Arai

IPC分类号： H01L23/48 ,  B05C13/02

CPC分类号： H01L21/0485 ,  H01L21/67115 ,  H01L21/68735 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor manufacturing apparatus which performs a rapid heat treatment in which metallic thin films 11 and 12 to be metallic electrodes are formed on a top surface and a bottom surface of a silicon carbide semiconductor substrate 10, and thereafter, the silicon carbide semiconductor substrate 10 is heated. The semiconductor manufacturing apparatus is configured such that the silicon carbide semiconductor substrate 10 is held by a holding structure 20 by means of a contact with an exterior of a region formed with the metallic thin films 11 and 12 on the silicon carbide semiconductor substrate 10, and the held silicon carbide semiconductor substrate 10 is placed in an interior of a heating chamber of the semiconductor manufacturing apparatus.

摘要翻译： 执行快速热处理的半导体制造装置，其中在碳化硅半导体衬底10的顶表面和底表面上形成金属电极的金属薄膜11和12，其后，碳化硅半导体衬底10是 加热。 半导体制造装置被构造成使得碳化硅半导体衬底10通过与在碳化硅半导体衬底10上形成有金属薄膜11和12的区域的外部接触的保持结构20来保持，以及 将保持的碳化硅半导体衬底10放置在半导体制造装置的加热室的内部。

公开(公告)号：US5883013A

公开(公告)日：1999-03-16

申请号：US578127

申请日：1995-12-26

申请人： Takatoshi Noguchi ,  Norihiko Kiritani

发明人： Takatoshi Noguchi ,  Norihiko Kiritani

IPC分类号： H01L21/308 ,  H01L21/311 ,  H01L21/312 ,  H01L21/314 ,  H01L21/31

CPC分类号： H01L21/3121 ,  H01L21/31111 ,  H01L21/31133

摘要： A method of forming a silicone resin film for protecting a semiconductor substrate on the substrate for a certain period of time and then removing the film from the substrate including the steps of: (a) forming the silicone resin film, on at least one portion of the substrate; (b) treating the film with an organic solvent, so that a majority of the film is dissolved in the organic solvent and thereby removed from the substrate and that a residue remains on the substrate; (c) oxidizing the residue to silicon oxide; and (d) treating the silicon oxide with an aqueous solution containing at least one of hydrogen fluoride and ammonium fluoride, so as to dissolve the silicon oxide in the solution and to thereby remove the silicon oxide from the substrate is described. The silicone resin film formed on the substrate can be easily completely removed, without damaging the electrical characteristics of the semiconductor.

摘要翻译： 一种形成有机硅树脂膜的方法，用于保护半导体衬底在衬底上一段时间，然后从衬底上除去膜，包括以下步骤：（a）在有机硅树脂膜的至少一部分上形成有机硅树脂膜， 基材; （b）用有机溶剂处理薄膜，使得大部分薄膜溶解在有机溶剂中，从而从基材上除去残余物残留在基材上; （c）将残余物氧化成氧化硅; 并且（d）描述了用含有氟化氢和氟化铵中的至少一种的水溶液处理氧化硅，从而将氧化硅溶解在溶液中，从而从衬底上除去氧化硅。 形成在基板上的有机硅树脂膜可以容易地完全去除，而不损害半导体的电特性。

公开(公告)号：US5804090A

公开(公告)日：1998-09-08

申请号：US617215

申请日：1996-03-18

申请人： Yasukazu Iwasaki ,  Norihiko Kiritani ,  Makiko Mitamura ,  Takatoshi Noguchi ,  Makoto Uchiyama

发明人： Yasukazu Iwasaki ,  Norihiko Kiritani ,  Makiko Mitamura ,  Takatoshi Noguchi ,  Makoto Uchiyama

IPC分类号： G01L9/00 ,  G01P15/08 ,  H01L21/306 ,  B44C1/22

CPC分类号： H01L21/30608 ,  G01L9/0042 ,  G01P15/0802

摘要： An etching process for a silicon semiconductor substrate to produce a semiconductor pressure sensor or a semiconductor acceleration sensor. The etching process comprises the following steps: (a) carrying out an etching of the semiconductor without application of a voltage to the semiconductor so as to accomplish a pre-etching step, the pre-etching step including dipping the semiconductor in hydrazine hydrate; and (b) carrying out an electrochemical etching of the semiconductor by applying pre-etching step so as to accomplish a final etching step, the final etching step including dipping the semiconductor in an alkali system etching solution containing at least hydrazine (N.sub.2 H.sub.4), potassium hydroxide (KOH), and water (H.sub.2 O), the alkali system etching solution containing potassium hydroxide in an amount of not less than 0.3% by weight.

摘要翻译： 一种硅半导体衬底的蚀刻工艺，用于制造半导体压力传感器或半导体加速度传感器。 蚀刻工艺包括以下步骤：（a）对半导体进行不施加电压的蚀刻，以实现预蚀刻步骤，所述预蚀刻步骤包括将半导体浸入水合肼中; 并且（b）通过施加预蚀刻步骤进行半导体的电化学蚀刻，以便完成最终的蚀刻步骤，最后的蚀刻步骤包括将半导体浸入至少含有肼（N 2 H 4），钾 氢氧化物（KOH）和水（H 2 O），含有不小于0.3重量％的氢氧化钾的碱系蚀刻溶液。

公开(公告)号：US20070283927A1

公开(公告)日：2007-12-13

申请号：US11806604

申请日：2007-06-01

申请人： Takafumi Fukumoto ,  Hiroyuki Kaneko ,  Norihiko Kiritani ,  Ryuuta Yamaguchi ,  Yuuichi Igari

发明人： Takafumi Fukumoto ,  Hiroyuki Kaneko ,  Norihiko Kiritani ,  Ryuuta Yamaguchi ,  Yuuichi Igari

IPC分类号： F02M53/06

CPC分类号： F02M31/125 ,  F01P2060/10 ,  F02M53/02 ,  F02M53/06 ,  F02M61/1853 ,  F02M63/0225 ,  F28D7/0016 ,  F28D7/024 ,  F28F3/12 ,  Y02T10/126

摘要： A fuel injection system of an internal combustion engine has an injector that injects fuel into an intake system or a combustion chamber of an internal combustion engine, and a pressurizing device that pressurizes the fuel to a predetermined pressure. Further, the system has a first heating device that heats the fuel on an upstream side of the injector, and a second heating device that further heats the fuel heated by the first heating device. The second heating device is provided in the injector. Furthermore, the system has a control device that controls the second heating device to heat up the fuel heated by the first heating device to a predetermined temperature.

摘要翻译： 内燃机的燃料喷射系统具有将燃料喷射到内燃机的进气系统或燃烧室中的喷射器，以及将燃料加压至规定压力的加压装置。 此外，该系统具有加热喷射器的上游侧的燃料的第一加热装置和进一步加热由第一加热装置加热的燃料的第二加热装置。 第二加热装置设置在喷射器中。 此外，该系统具有控制装置，其控制第二加热装置将由第一加热装置加热的燃料加热至预定温度。

公开(公告)号：US06815299B2

公开(公告)日：2004-11-09

申请号：US09817154

申请日：2001-03-27

申请人： Norihiko Kiritani

发明人： Norihiko Kiritani

IPC分类号： H01L21336

CPC分类号： H01L29/66068 ,  H01L21/02164 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02337 ,  H01L21/049 ,  H01L21/31658 ,  H01L21/7602 ,  H01L21/76227

摘要： A method for manufacturing a SiC device embraces (a) depositing a polysilicon film above a SiC substrate; (b) delineating the polysilicon film into required pattern; and (c) annealing the SiC substrate in a water rich ambient to selectively grow a thick localized thermal oxide film above the SiC substrate. At the surface of SiC substrate, source/drain regions and substrate contact region are formed. In the water rich ambient, the H2O partial pressure is so maintained that it is more than 0.95.

摘要翻译： 一种制造SiC器件的方法包括（a）在SiC衬底上沉积多晶硅膜; （b）将多晶硅膜描绘成所需的图案; 和（c）在富含水的环境中退火SiC衬底以选择性地生长SiC衬底之上的厚的局部热氧化膜。 在SiC衬底的表面形成源/漏区和衬底接触区。 在富含水的环境中，H2O分压保持在0.95以上。

公开(公告)号：US5167778A

公开(公告)日：1992-12-01

申请号：US740521

申请日：1991-08-05

申请人： Hiroyuki Kaneko ,  Makoto Uchiyama ,  Hidetoshi Nojiri ,  Norihiko Kiritani

发明人： Hiroyuki Kaneko ,  Makoto Uchiyama ,  Hidetoshi Nojiri ,  Norihiko Kiritani

IPC分类号： G01L9/04 ,  C25F3/30 ,  G01L9/00 ,  H01L21/3063 ,  H01L29/84

CPC分类号： H01L21/3063

摘要： An electrochemical etching method for producing semiconductor diaphragms from a semiconductor wafer comprised of a first semiconductor layer of a first conductivity type and a second semiconductor layer formed on the first semiconductor layer, the second semiconductor layer having a second conductivity type different than the first semiconductor layer. The semiconductor wafer is placed in an etching solution with respect to a counter-electrode immersed in the etching solution. The semiconductor wafer has a plurality of chips each of which includes at least one third semiconductor layer of the first conductivity type. The third semiconductor layer extends through the second semiconductor layer to the first semiconductor layer. A first positive potential is applied to the first and third semiconductor layers with respect to the counter-electrode. A second positive potential is applied to the second semiconductor layer with respect to the first semiconductor layer.

摘要翻译： 一种用于从由第一导电类型的第一半导体层和形成在第一半导体层上形成的第二半导体层的半导体晶片制造半导体膜片的电化学蚀刻方法，所述第二半导体层具有不同于第一半导体层的第二导电类型 。 将半导体晶片相对于浸在蚀刻溶液中的对电极放置在蚀刻溶液中。 半导体晶片具有多个芯片，每个芯片包括至少一个第一导电类型的第三半导体层。 第三半导体层延伸穿过第二半导体层到第一半导体层。 第一和第三半导体层相对于反电极施加第一正电位。 第二正电位相对于第一半导体层施加到第二半导体层。