NONVOLATILE MEMORIES WITH TUNNEL DIELECTRIC WITH CHLORINE
    1.
    发明申请
    NONVOLATILE MEMORIES WITH TUNNEL DIELECTRIC WITH CHLORINE 有权
    非线性记忆与隧道电介质

    公开(公告)号:US20090303787A1

    公开(公告)日:2009-12-10

    申请号:US12134834

    申请日:2008-06-06

    摘要: In a nonvolatile memory cell with charge trapping dielectric (150), the tunnel dielectric (140) includes chlorine adjacent to the charge trapping dielectric but no chlorine (or less chlorine) adjacent to the cell's channel region (120). The chlorine adjacent to the charge trapping dielectric serves to improve the programming and/or erase speed. The low chlorine concentration adjacent to the channel region prevents chlorine from degrading the data retention. Other features are also provided.

    摘要翻译: 在具有电荷捕获电介质(150)的非易失性存储单元中,隧道电介质(140)包括邻近电荷捕获电介质的氯,而与电池的沟道区(120)相邻的氯不含氯(或更少的氯)。 与电荷捕获介质相邻的氯用于改善编程和/或擦除速度。 与通道区相邻的低氯浓度防止氯降解数据保留。 还提供其他功能。

    Nonvolatile memories with tunnel dielectric with chlorine
    2.
    发明授权
    Nonvolatile memories with tunnel dielectric with chlorine 有权
    带有隧道电介质的非易失性存储器

    公开(公告)号:US07737487B2

    公开(公告)日:2010-06-15

    申请号:US12134834

    申请日:2008-06-06

    摘要: In a nonvolatile memory cell with charge trapping dielectric (150), the tunnel dielectric (140) includes chlorine adjacent to the charge trapping dielectric but no chlorine (or less chlorine) adjacent to the cell's channel region (120). The chlorine adjacent to the charge trapping dielectric serves to improve the programming and/or erase speed. The low chlorine concentration adjacent to the channel region prevents chlorine from degrading the data retention. Other features are also provided.

    摘要翻译: 在具有电荷捕获电介质(150)的非易失性存储单元中,隧道电介质(140)包括邻近电荷捕获电介质的氯,而与电池的沟道区(120)相邻的氯不含氯(或更少的氯)。 与电荷捕获介质相邻的氯用于改善编程和/或擦除速度。 与通道区相邻的低氯浓度防止氯降解数据保留。 还提供其他功能。

    Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSG
    3.
    发明授权
    Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSG 有权
    用于同时制造ONO型存储单元的方法以及用于低压逻辑晶体管的相关高电压写入晶体管和栅极电介质的栅极电介质通过使用ISSG

    公开(公告)号:US07297597B2

    公开(公告)日:2007-11-20

    申请号:US10898273

    申请日:2004-07-23

    IPC分类号: H01L21/336

    摘要: Conventional fabrication of top oxide in an ONO-type memory cell stack usually produces Bird's Beak. Certain materials in the stack such as silicon nitrides are relatively difficult to oxidize. As a result oxidation does not proceed uniformly along the multi-layered height of the ONO-type stack. The present disclosure shows how radical-based fabrication of top-oxide of an ONO stack (i.e. by ISSG method) can help to reduce formation of Bird's Beak. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse deeply through already oxidized layers of the ONO stack such as the lower silicon oxide layer. As a result, a more uniform top oxide dielectric can be fabricated with more uniform breakdown voltages along its height. Additionally, adjacent low and high voltage transistors may benefit from simultaneous formation of their gate dielectrics with use of the radical-based oxidizing method.

    摘要翻译: ONO型记忆体堆叠中的顶层氧化物的常规制造通常产生Bird's Beak。 叠层中的某些材料如氮化硅相对难以氧化。 因此,氧化不会沿着ONO型堆叠的多层高度均匀地进行。 本公开显示了如何基于根基的ONO堆叠的顶部氧化物的制造(即通过ISSG方法)可以帮助减少Bird's Beak的形成。 更具体地,表明短寿命氧化剂(例如原子氧)能够更好地氧化难以氧化的材料,例如氮化硅,并且表明短寿命氧化剂交替地或另外不会扩散深 通过已经氧化的ONO堆叠层,例如较低的氧化硅层。 结果,可以制造更均匀的顶部氧化物电介质,沿其高度具有更均匀的击穿电压。 此外,相邻的低压和高压晶体管可以受益于使用基于自由基的氧化方法同时形成其栅极电介质。

    Precision creation of inter-gates insulator
    5.
    发明授权
    Precision creation of inter-gates insulator 有权
    精密创建栅极间绝缘体

    公开(公告)号:US07229880B2

    公开(公告)日:2007-06-12

    申请号:US10718008

    申请日:2003-11-19

    IPC分类号: H01L21/336

    CPC分类号: H01L29/511 H01L21/28273

    摘要: An ONO-type inter-poly insulator is formed by depositing intrinsic silicon on an oxidation stop layer. In one embodiment, the oxidation stop layer is a nitridated top surface of a lower, and conductively-doped, polysilicon layer. In one embodiment, atomic layer deposition (ALD) is used to precisely control the thickness of the deposited, intrinsic silicon. Heat and an oxidizing atmosphere are used to convert the deposited, intrinsic silicon into thermally-grown, silicon dioxide. The oxidation stop layer impedes deeper oxidation. A silicon nitride layer and an additional silicon oxide layer are further deposited to complete the ONO structure before an upper, and conductively-doped, polysilicon layer is formed. In one embodiment, the lower and upper polysilicon layers are patterned to respectively define a floating gate (FG) and a control gate (CG) of an electrically re-programmable memory cell. In an alternative embodiment, after the middle, silicon nitride of the ONO structure is defined, another layer of intrinsic silicon is deposited, by way of for example, ALD. Heat and an oxidizing atmosphere are used to convert the second deposited, intrinsic silicon into thermally-grown, silicon dioxide. An ONO structure with two thermally-grown, and spaced apart, silicon oxide layers is thereby provided.

    摘要翻译: 通过在氧化停止层上沉积本征硅来形成ONO型多晶硅绝缘体。 在一个实施方案中,氧化停止层是较低且导电掺杂的多晶硅层的氮化顶表面。 在一个实施例中,原子层沉积(ALD)用于精确控制沉积的本征硅的厚度。 使用热和氧化气氛将沉积的本征硅转化成热生长的二氧化硅。 氧化停止层阻碍更深的氧化。 在形成上部和导电掺杂的多晶硅层之前,进一步沉积氮化硅层和另外的氧化硅层以完成ONO结构。 在一个实施例中,下部和上部多晶硅层被图案化以分别限定电可重新编程的存储器单元的浮动栅极(FG)和控制栅极(CG)。 在替代实施例中,在中间形成ONO结构的氮化硅之后,通过例如ALD沉积另一层本征硅。 使用热和氧化气氛将第二沉积的本征硅转化成热生长的二氧化硅。 由此提供具有两个热生长和间隔开的氧化硅层的ONO结构。

    Methods for improving quality of high temperature oxide (HTO) formed from halogen-containing precursor and products thereof and apparatus therefor
    6.
    发明申请
    Methods for improving quality of high temperature oxide (HTO) formed from halogen-containing precursor and products thereof and apparatus therefor 有权
    用于提高由含卤素前体及其产物形成的高温氧化物(HTO)的质量的方法及其设备

    公开(公告)号:US20060211270A1

    公开(公告)日:2006-09-21

    申请号:US11431087

    申请日:2006-05-04

    IPC分类号: H01L21/31

    摘要: A method and apparatus are disclosed for reducing the concentration of chlorine and/or other bound contaminants within a semiconductor oxide composition that is formed by chemical vapor deposition (CVD) using a semiconductor-element-providing reactant such as dichlorosilane (DCS) and an oxygen-providing reactant such as N2O. In one embodiment, a DCS-HTO film is annealed by heating N2O gas to a temperature in the range of about 825° C. to about 950 ° C. so as to trigger exothermic decomposition of the N2O gas and flowing the heated gas across the DCS-HTO film so that disassociated atomic oxygen radicals within the heated N2O gas can transfer disassociating energy to chlorine atoms bound within the DCS-HTO film and so that the atomic oxygen radicals can fill oxygen vacancies within the semiconductor-oxide matrix of DCS-HTO film. An improved ONO structure may be formed with the annealed DCS-HTO film for use in floating gate or other memory applications.

    摘要翻译: 公开了一种方法和装置,用于降低通过化学气相沉积(CVD)形成的半导体氧化物组合物中的氯和/或其它结合的污染物的浓度,所述半导体氧化物组合物使用提供半导体元素的反应物如二氯硅烷(DCS)和氧 提供反应物如N 2 O。 在一个实施方案中,通过将N 2 O 2气体加热至约825℃至约950℃的温度来退火DCS-HTO膜,以引发放热分解 N 2 O气体并使加热的气体流过DCS-HTO膜,使得加热的N 2 O气体内的解离的原子氧自由基能够将分解能量转移到结合的氯原子上 在DCS-HTO膜内,使得原子氧自由基可以填充DCS-HTO膜的半导体氧化物基质内的氧空位。 可以用退火的DCS-HTO膜形成改进的ONO结构,用于浮动栅极或其他存储器应用中。

    Method to reduce variation in LDD series resistance
    7.
    发明授权
    Method to reduce variation in LDD series resistance 有权
    降低LDD串联电阻变化的方法

    公开(公告)号:US06534388B1

    公开(公告)日:2003-03-18

    申请号:US09670330

    申请日:2000-09-27

    IPC分类号: H01L2104

    摘要: A process used to retard out diffusion of P type dopants from P type LDD regions, resulting in unwanted LDD series resistance increases, has been developed. The process features the formation of a nitrogen containing layer, placed between the P type LDD region and overlying silicon oxide regions, retarding the diffusion of boron from the LDD regions to the overlying silicon oxide regions, during subsequent high temperature anneals. The nitrogen containing layer, such as a thin silicon nitride layer, or a silicon oxynitride layer, formed during or after reoxidation of a P type polysilicon gate structure, is also formed in a region that also retards the out diffusion of P type dopants from the P type polysilicon gate structure.

    摘要翻译: 已经开发了用于阻止P型掺杂剂从P型LDD区扩散的过程,导致不希望的LDD串联电阻增加。 该过程的特征在于形成含氮层,放置在P型LDD区域和覆盖的氧化硅区域之间,在随后的高温退火期间阻止硼从LDD区域扩散到覆盖的氧化硅区域。 在P型多晶硅栅极结构再氧化期间或之后形成的氮化硅层或氮氧化硅层等氮含量层也形成在也延缓P型掺杂剂从 P型多晶硅栅结构。

    Method of forming low pressure silicon oxynitride dielectrics having high reliability
    8.
    发明授权
    Method of forming low pressure silicon oxynitride dielectrics having high reliability 失效
    形成具有高可靠性的低压氮氧化硅电介质的方法

    公开(公告)号:US06261976B1

    公开(公告)日:2001-07-17

    申请号:US09270590

    申请日:1999-03-18

    申请人: Zhong Dong

    发明人: Zhong Dong

    IPC分类号: H01L21469

    摘要: A method for improving oxide quality and reliability by using low pressure during oxidation and nitridation is described. The wafer is loaded into a chamber wherein a pressure of between about 80 and 300 torr is maintained during the forming of the dielectric layer. The silicon substrate of the wafer is oxidized, then nitrided. The substrate is annealed to complete formation of the dielectric layer.

    摘要翻译: 描述了在氧化和氮化期间通过使用低压改善氧化物质量和可靠性的方法。 将晶片装载到在形成介电层期间保持在约80和300托之间的压力的室中。 晶片的硅衬底被氧化,然后氮化。 将衬底退火以完成介电层的形成。

    Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer
    9.
    发明授权
    Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer 有权
    修复硅衬底中的深层地下缺陷的方法,其包括从牺牲氧化物层将带负电荷的离子扩散到衬底中

    公开(公告)号:US07851339B2

    公开(公告)日:2010-12-14

    申请号:US12128996

    申请日:2008-05-29

    IPC分类号: H01L21/225

    摘要: Performance of field effect transistors and other channel dependent devices formed on a monocrystalline substrate is improved by carrying out a high temperature anneal in a nitrogen releasing atmosphere while the substrate is coated by a sacrificial oxide coating containing easily diffusible atoms that can form negatively charged ions and can diffuse deep into the substrate. In one embodiment, the easily diffusible atoms comprise at least 5% by atomic concentration of chlorine atoms in the sacrificial oxide coating and the nitrogen releasing atmosphere includes NO. The high temperature anneal is carried out for less than 10 hours at a temperature less than 1100° C.

    摘要翻译: 通过在氮气释放气氛中进行高温退火,同时通过包含容易扩散的原子的牺牲氧化物涂层涂覆基底,从而改善在单晶衬底上形成的场效应晶体管和其它通道相关器件的性能,所述牺牲氧化物涂层可形成带负电荷的离子, 可以深层扩散到底物中。 在一个实施方案中,容易扩散的原子在牺牲氧化物涂层中包含至少5%的原子浓度的氯原子,并且氮气释放气氛包括NO。 高温退火在低于1100℃的温度下进行少于10小时。