公开(公告)号：US20050150540A1

公开(公告)日：2005-07-14

申请号：US11072551

申请日：2005-03-03

申请人： Zili Li ,  Iwona Turlik ,  Kevin Jelley

发明人： Zili Li ,  Iwona Turlik ,  Kevin Jelley

IPC分类号： G02F1/133 ,  G02F1/1334 ,  G02F1/1335 ,  G02F1/137 ,  H01L31/00 ,  H01L25/00 ,  H02N6/00

CPC分类号： G02F1/13306 ,  G02F1/1334 ,  G02F1/133553 ,  G02F1/13718 ,  G02F2001/13324 ,  G02F2001/133521

摘要： Liquid crystal displays (10) and touch sensitive displays (41) are stacked with one or more solar cells (15) such that light passing through the displays will illuminate the light receiving active surface of the solar cells (15). No reflector or polarizer need be used when the liquid crystal display (10) uses cholesteric or polymer dispersed liquid crystals. When using supertwist nematic or twisted nematic liquid crystals, a reflector (21) can be used that comprises a selective color reflector. The resultant display/solar cell can be utilized in combination with a device such as a wireless communications device (62) with the solar cell (15) providing electricity to the display (61), the wireless communications device (62), or both. A mask (71) can be used to occlude surface features on the solar cell (15) as appropriate to provide a substantially uniformly colored appearance.

摘要翻译： 液晶显示器（10）和触敏显示器（41）与一个或多个太阳能电池（15）堆叠，使得穿过显示器的光将照射太阳能电池（15）的光接收有源表面。 当液晶显示器（10）使用胆甾型或聚合物分散液晶时，不需要使用反射器或偏光片。 当使用超扭曲向列或扭曲向列液晶时，可以使用包括选择性彩色反射器的反射器（21）。 所得的显示/太阳能电池可以与诸如无线通信设备（62）的设备结合使用，太阳能电池（15）向显示器（61），无线通信设备（62）或两者提供电力。 可以使用掩模（71）来适当地遮挡太阳能电池（15）上的表面特征以提供基本上均匀着色的外观。

公开(公告)号：US07206044B2

公开(公告)日：2007-04-17

申请号：US10001495

申请日：2001-10-31

申请人： Zili Li ,  Iwona Turlik ,  Kevin W. Jelley

发明人： Zili Li ,  Iwona Turlik ,  Kevin W. Jelley

IPC分类号： G02F1/1335

CPC分类号： G02F1/13306 ,  G02F1/1334 ,  G02F1/133553 ,  G02F1/13718 ,  G02F2001/13324 ,  G02F2001/133521

摘要： Displays such as liquid crystal displays (10), organic light emitting diode displays, and touch sensitive displays (41) are stacked with one or more solar cells (15) such that light passing through the displays will illuminate the light receiving active surface of the solar cells (15). No reflector or polarizer need be used when the liquid crystal display (10) uses cholesteric or polymer dispersed liquid crystals. When using supertwist nematic or twisted nematic liquid crystals, a reflector (21) can be used that comprises a selective color reflector. The resultant display/solar cell can be utilized in combination with a device such as a wireless communications device (62) with the solar cell (15) providing electricity to the display (61), the wireless communications device (62), or both. A mask (71) can be used to occlude surface features on the solar cell (15) as appropriate to provide a substantially uniformly colored appearance.

摘要翻译： 液晶显示器（10），有机发光二极管显示器和触敏显示器（41）的显示器与一个或多个太阳能电池（15）堆叠，使得通过显示器的光将照亮所述光接收有源表面 太阳能电池（15）。 当液晶显示器（10）使用胆甾型或聚合物分散液晶时，不需要使用反射器或偏光片。 当使用超扭曲向列或扭曲向列液晶时，可以使用包括选择性彩色反射器的反射器（21）。 所得的显示/太阳能电池可以与诸如无线通信设备（62）的设备结合使用，太阳能电池（15）向显示器（61），无线通信设备（62）或两者提供电力。 可以使用掩模（71）来适当地遮挡太阳能电池（15）上的表面特征以提供基本上均匀着色的外观。

公开(公告)号：US5638469A

公开(公告)日：1997-06-10

申请号：US108042

申请日：1993-08-16

申请人： Michael R. Feldman ,  Iwona Turlik ,  Gretchen M. Adema

发明人： Michael R. Feldman ,  Iwona Turlik ,  Gretchen M. Adema

IPC分类号： G02B6/10 ,  G02B6/42 ,  G02B6/43 ,  H01L23/48 ,  G03H1/00

CPC分类号： H01L24/73 ,  G02B6/43 ,  H01L23/48 ,  G02B6/4232 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/15192

摘要： A multichip module having high density optical and electrical interconnections between integrated circuit chips includes a substrate overlaying an array of integrated circuit chips. An optical transmitter generates a first optical beam through the substrate and an optical detector receives a second optical beam through the substrate. A hologram is positioned in the path of at least one of the first and second optical beams. An array of electrical contact pads is located on the substrate corresponding to the array of electrical contact pads on the respective integrated circuit chips. A pattern of electrical interconnection lines is located on the substrate for electrically interconnecting the integrated circuit chips. A solder bump between electrical contact pads on the substrate and on the integrated circuit chips establish electrical connections between the substrate and the integrated circuit chips, and also facilitate alignment of the integrated circuit chips with respect to the substrate. The optical transmitter and detector may be mounted on/in the substrate or on/in the integrated circuit chips. The optical transmitter and detector may also be used to provide optical connections external to the microelectronic module, using a holographic substrate to optically link modules. The substrate may also be used to establish optical alignment of the hologram to an underlying optical emitter and/or optical detector without establishing electrical connections thereto.

摘要翻译： 在集成电路芯片之间具有高密度光电互连的多芯片模块包括覆盖集成电路芯片阵列的衬底。 光学发射器通过衬底产生第一光束，并且光学检测器接收穿过衬底的第二光束。 全息图位于第一和第二光束中的至少一个光路的路径中。 电接触焊盘的阵列位于相应于相应集成电路芯片上的电接触焊盘阵列的衬底上。 电互连线的图案位于基板上，用于电连接集成电路芯片。 衬底上和集成电路芯片之间的电接触焊盘之间的焊料凸块建立了衬底和集成电路芯片之间的电连接，并且还有助于集成电路芯片相对于衬底的对准。 光发射机和检测器可以安装在基板上或集成电路芯片中/之上。 光学发射器和检测器也可用于提供微电子模块外部的光学连接，使用全息基板来光学连接模块。 衬底也可用于建立全息图与下面的光发射器和/或光学检测器的光学对准，而不建立与其的电连接。

公开(公告)号：US5289631A

公开(公告)日：1994-03-01

申请号：US845996

申请日：1992-03-04

申请人： Nicholas G. Koopman ,  Glenn A. Rinne ,  Iwona Turlik ,  Edward K. Yung

发明人： Nicholas G. Koopman ,  Glenn A. Rinne ,  Iwona Turlik ,  Edward K. Yung

IPC分类号： G01R31/26 ,  G01R31/28 ,  H01L21/326 ,  H01L21/66 ,  H01L23/58 ,  H05K3/34

CPC分类号： G01R31/2863 ,  H01L22/32 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/16 ,  H01L2924/01014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15174 ,  H01L2924/15192 ,  Y10T29/49144

摘要： An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips. Solder bumps with different characteristics may be formed by varying the current-time product to each individual pad of the temporary substrate during a plating operation.

摘要翻译： 可以使用具有对应于芯片上的输入/输出焊盘的位置的衬底焊盘的临时衬底来测试其上具有焊料凸块的集成电路芯片，并且在临时衬底焊盘上具有牺牲导体层。 焊料凸点放置在相应的牺牲金属层附近，并被加热以在芯片和临时衬底之间形成电气和机械连接。 然后在临时衬底上测试和/或烧入芯片。 在测试/老化之后，通过加热将牺牲金属层溶解到焊料凸块中。 包括其中具有溶解的牺牲金属层的焊料凸块的集成电路芯片可以容易地从临时衬底移除。 也可以在临时衬底上形成焊料凸块并将其转移到未凸起的芯片。 可以通过在电镀操作期间通过改变临时衬底的每个单独衬垫的电流时间积来形成具有不同特性的焊料凸块。

公开(公告)号：US20080135282A1

公开(公告)日：2008-06-12

申请号：US11609069

申请日：2006-12-11

申请人： Krishna D. Jonnalagadda ,  Daniel R. Gamota ,  Iwona Turlik

发明人： Krishna D. Jonnalagadda ,  Daniel R. Gamota ,  Iwona Turlik

IPC分类号： H05K1/16 ,  H05K3/12

CPC分类号： H05K3/4664 ,  H05K1/16 ,  H05K3/12 ,  H05K3/4069 ,  H05K2203/0113 ,  H05K2203/0143 ,  Y10T29/49155

摘要： A printed multilayer electronic circuit has printed electronic components on a first level circuit. Electrical conductors are printed on the first level circuit, electrically connected to the electronic components. A layer of dielectric material is printed over the printed electrical conductors. The dielectric layer contains apertures or openings that extend vertically through the dielectric layer down to the electrical conductors. A second set of electrical conductors are then printed on the dielectric layer, situated around the apertures. Electrically conductive material is printed in the apertures so that an electrical connection is made from the second set of electrical conductors to the electrical conductors on the lower level. A second level circuit having additional electronic components is then formed on the dielectric layer and the second set of conductors, so that these electronic components are electrically connected to the electronic components on the first level circuit through the path of the printed second set of electrical conductors, the printed electrically conductive material, and the printed electrical conductors on the lower level.

摘要翻译： 印刷的多层电子电路在第一级电路上印刷了电子部件。 电导体印刷在第一级电路上，电连接到电子部件。 电介质材料层印在印刷电导体上。 电介质层包含沿电介质层垂直延伸到电导体的孔或开口。 然后将第二组电导体印刷在位于孔周围的电介质层上。 导电材料印刷在孔中，使得从第二组电导体到下层的电导体形成电连接。 然后在介电层和第二组导体上形成具有附加电子部件的第二电平电路，使得这些电子部件通过印刷的第二组电导体的路径电连接到第一电平电路上的电子部件 ，印刷的导电材料和下层的印刷电导体。

公开(公告)号：US6049463A

公开(公告)日：2000-04-11

申请号：US900403

申请日：1997-07-25

申请人： Grace M. O'Malley ,  Lillian C. Thompson ,  George Amos Carson ,  Iwona Turlik

发明人： Grace M. O'Malley ,  Lillian C. Thompson ,  George Amos Carson ,  Iwona Turlik

IPC分类号： G06K19/077 ,  H05K7/02

CPC分类号： G06K19/0775 ,  G06K19/07745 ,  G06K19/07749 ,  H01L2224/48091 ,  H01L2924/01078 ,  H01L2924/01322

摘要： A microelectronic assembly (10) includes a polymeric card (12) that includes a substantially planar major surface (18). An integrated circuit component (14) is embedded in the polymeric card (12) and has a first contact (20) and a second contact (22). An antenna element (16) is formed of a singular metallic strip and includes a first terminal (26) electrically connected to the first contact (20), a second terminal (28) electrically connected to the second contact (22), and a loop (30) intermediate the first terminal (26) and the second terminal (28). The first terminal (26) includes a first outer surface (32) and the second terminal (28) includes a second outer surface (34). The first outer surface (32) and the second outer surface (34) are exposed at the major surface (18) and are coextensive therewith. The loop (30) is embedded within the polymeric card (12) and spaced apart from the major surface (18).

摘要翻译： 微电子组件（10）包括聚合卡（12），其包括基本上平面的主表面（18）。 集成电路部件（14）嵌入在聚合物卡（12）中并且具有第一接触件（20）和第二接触件（22）。 天线元件（16）由单个金属条形成，并且包括电连接到第一触点（20）的第一端子（26），与第二触点（22）电连接的第二端子（28） （30）在第一端子（26）和第二端子（28）之间。 第一端子（26）包括第一外表面（32），第二端子（28）包括第二外表面（34）。 第一外表面（32）和第二外表面（34）在主表面（18）处暴露并与其共同延伸。 环（30）嵌入在聚合物卡（12）内并且与主表面（18）间隔开。

公开(公告)号：US5923796A

公开(公告)日：1999-07-13

申请号：US842846

申请日：1997-04-17

申请人： Michael R. Feldman ,  Iwona Turlik ,  Gretchen M. Adema

发明人： Michael R. Feldman ,  Iwona Turlik ,  Gretchen M. Adema

IPC分类号： G02B6/10 ,  G02B6/42 ,  G02B6/43 ,  H01L23/48 ,  G03H1/00

CPC分类号： H01L24/73 ,  G02B6/43 ,  H01L23/48 ,  G02B6/4232 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/15192

摘要： A multichip module having high density optical and electrical interconnections between integrated circuit chips includes a substrate overlaying an array of integrated circuit chips. An optical transmitter generates a first optical beam through the substrate and an optical detector receives a second optical beam through the substrate. A hologram is positioned in the path of at least one of the first and second optical beams. An array of electrical contact pads is located on the substrate corresponding to the array of electrical contact pads on the respective integrated circuit chips. A pattern of electrical interconnection lines is located on the substrate for electrically interconnecting the integrated circuit chips. A solder bump between electrical contact pads on the substrate and on the integrated circuit chips establish electrical connections between the substrate and the integrated circuit chips, and also facilitate alignment of the integrated circuit chips with respect to the substrate. The optical transmitter and detector may be mounted on/in the substrate or on/in the integrated circuit chips. The optical transmitter and detector may also be used to provide optical connections external to the microelectronic module, using a holographic substrate to optically link modules. The substrate may also be used to establish optical alignment of the hologram to an underlying optical emitter and/or optical detector without establishing electrical connections thereto.

公开(公告)号：US5381946A

公开(公告)日：1995-01-17

申请号：US127785

申请日：1993-09-27

申请人： Nicholas G. Koopman ,  Glenn A. Rinne ,  Iwona Turlik ,  Edward K. Yung

发明人： Nicholas G. Koopman ,  Glenn A. Rinne ,  Iwona Turlik ,  Edward K. Yung

IPC分类号： G01R31/26 ,  G01R31/28 ,  H01L21/326 ,  H01L21/66 ,  H01L23/58 ,  H01L21/60

CPC分类号： G01R31/2863 ,  H01L22/32 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/16 ,  H01L2924/01014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15174 ,  H01L2924/15192 ,  Y10T29/49144

摘要： An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips. Solder bumps with different characteristics may be formed by varying the current-time product to each individual pad of the temporary substrate during a plating operation.

摘要翻译： 可以使用具有对应于芯片上的输入/输出焊盘的位置的衬底焊盘的临时衬底来测试其上具有焊料凸块的集成电路芯片，并且在临时衬底焊盘上具有牺牲导体层。 焊料凸点放置在相应的牺牲金属层附近，并被加热以在芯片和临时衬底之间形成电气和机械连接。 然后在临时衬底上测试和/或烧入芯片。 在测试/老化之后，通过加热将牺牲金属层溶解到焊料凸块中。 包括其中具有溶解的牺牲金属层的焊料凸块的集成电路芯片可以容易地从临时衬底移除。 也可以在临时衬底上形成焊料凸块并将其转移到未凸起的芯片。 可以通过在电镀操作期间通过改变临时衬底的每个单独衬垫的电流时间积来形成具有不同特性的焊料凸块。

公开(公告)号：US5009360A

公开(公告)日：1991-04-23

申请号：US486064

申请日：1990-02-27

申请人： Arnold Reisman ,  Deepak Nayak ,  Iwona Turlik

发明人： Arnold Reisman ,  Deepak Nayak ,  Iwona Turlik

IPC分类号： B23K20/16

CPC分类号： B23K20/16

摘要： A method and resulting structure is disclosed in which a metal-to-metal bond is formed by heating the surfaces to be bonded in an oxidizing ambient atmosphere until the desired bond is achieved. Heating takes place at 700.degree. C.-1200.degree. C. and bonding may be enhanced by applying pressure between the surfaces while heating.

摘要翻译： 公开了一种方法和结果，其中通过在氧化环境气氛中加热要结合的表面直到达到所需的粘结而形成金属 - 金属键。 加热在700℃-1200℃下进行，加热时可在表面之间施加压力来增强粘结。

公开(公告)号：US06829502B2

公开(公告)日：2004-12-07

申请号：US10158451

申请日：2002-05-30

申请人： Di-an Hong ,  Yong Liu ,  Tom Mathew ,  Iwona Turlik ,  Weinin Xiao

发明人： Di-an Hong ,  Yong Liu ,  Tom Mathew ,  Iwona Turlik ,  Weinin Xiao

IPC分类号： A61B504

CPC分类号： G06F3/015

摘要： Brain response signals of a user, such as electroencephalogram signals, and in particular visually evoked potential signals that correspond to predetermined illumination patterns, are detected and utilized to ascertain selection of specific functions and/or actions as desired by that user. Sources of illumination that exhibit such patterns are arranged to physically correspond to indicia of such functions and actions to facilitate knowing selection thereof.

摘要翻译： 检测并利用用户的脑响应信号，例如脑波信号，特别是对应于预定照明模式的视觉诱发电位信号，以确定用户所期望的特定功能和/或动作的选择。 呈现这种图案的照明源布置成物理上对应于这样的功能和动作的标记，以便于知道其选择。