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    Variable size capture pads for multilayer ceramic substrates and connectors therefor
    1.
    发明授权
    Variable size capture pads for multilayer ceramic substrates and connectors therefor 失效
    用于多层陶瓷基板的可变尺寸捕获垫及其连接器

    公开(公告)号：US5315485A

    公开(公告)日：1994-05-24

    申请号：US953564

    申请日：1992-09-29

    申请人： Paul A. Magill ,  Nicholas G. Koopman ,  Glenn A. Rinne

    发明人： Paul A. Magill ,  Nicholas G. Koopman ,  Glenn A. Rinne

    IPC分类号： H01L23/538 ,  H05K1/11

    CPC分类号： H01L23/5383 ,  H01L2924/0002

    摘要： Capture pads of variable size are provided on the face of a multilayer ceramic substrate, to accommodate the actual shrinkage tolerance of the substrate at each capture pad position. For example, assuming a minimum shrinkage reference point is at the center of the substrate face, the capture pad size is relatively large adjacent the edges of the substrate face and relatively small adjacent the center of the substrate face. By sizing each capture pad based on the maximum positional variation at the particular capture pad position, higher contact density is obtainable than with known uniform size capture pads. The variable size capture pads may also be used at one or more rows of capture pads located along one or more edges of the substrate, for electrical connection to an edge connector. For example, assuming a minimum shrinkage reference point at the center of the row, the capture pads are relatively large adjacent the ends of the row of capture pads and are relatively small adjacent the center of the row. Edge connectors with variable spacing of edge connector contacts are also provided. Capacitive ground plane coupling to the variable size capture pads is made uniform by providing a uniform size ground plane region adjacent each capture pad, with the uniform size being smaller than the smallest capture pad. A high density microelectronic substrate is thereby obtained without degrading the performance of the substrate.

    摘要翻译： 在多层陶瓷基板的表面上设置可变尺寸的捕获垫，以适应每个捕获垫位置处的基板的实际收缩公差。 例如，假设最小收缩参考点位于基板面的中心，捕获垫尺寸在基板面的边缘附近相对较大，并且邻近基板面的中心相对较小。 通过基于特定捕获垫位置处的最大位置变化来调整每个捕获垫的尺寸，可获得比已知的均匀尺寸捕获垫更高的接触密度。 可变尺寸捕获垫还可以用于沿着衬底的一个或多个边缘定位的一行或多行捕获垫，用于电连接到边缘连接器。 例如，假设在行的中心处的最小收缩参考点，捕获垫相邻于捕获垫行的端部相对较大并且在行的中心附近相对较小。 还提供了具有可变间距的边缘连接器触点的边缘连接器。 通过提供与每个捕获垫相邻的均匀尺寸的接地平面区域，与可变尺寸捕获垫耦合的电容式接地平面是均匀的，其均匀尺寸小于最小捕获垫。 由此获得高密度微电子衬底而不降低衬底的性能。

    Method for testing, burn-in, and/or programming of integrated circuit chips
    2.
    发明授权
    Method for testing, burn-in, and/or programming of integrated circuit chips 失效
    集成电路芯片的测试，老化和/或编程方法

    公开(公告)号：US5289631A

    公开(公告)日：1994-03-01

    申请号：US845996

    申请日：1992-03-04

    申请人： Nicholas G. Koopman ,  Glenn A. Rinne ,  Iwona Turlik ,  Edward K. Yung

    发明人： Nicholas G. Koopman ,  Glenn A. Rinne ,  Iwona Turlik ,  Edward K. Yung

    IPC分类号： G01R31/26 ,  G01R31/28 ,  H01L21/326 ,  H01L21/66 ,  H01L23/58 ,  H05K3/34

    CPC分类号： G01R31/2863 ,  H01L22/32 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/16 ,  H01L2924/01014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15174 ,  H01L2924/15192 ,  Y10T29/49144

    摘要： An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips. Solder bumps with different characteristics may be formed by varying the current-time product to each individual pad of the temporary substrate during a plating operation.

    摘要翻译： 可以使用具有对应于芯片上的输入/输出焊盘的位置的衬底焊盘的临时衬底来测试其上具有焊料凸块的集成电路芯片，并且在临时衬底焊盘上具有牺牲导体层。 焊料凸点放置在相应的牺牲金属层附近，并被加热以在芯片和临时衬底之间形成电气和机械连接。 然后在临时衬底上测试和/或烧入芯片。 在测试/老化之后，通过加热将牺牲金属层溶解到焊料凸块中。 包括其中具有溶解的牺牲金属层的焊料凸块的集成电路芯片可以容易地从临时衬底移除。 也可以在临时衬底上形成焊料凸块并将其转移到未凸起的芯片。 可以通过在电镀操作期间通过改变临时衬底的每个单独衬垫的电流时间积来形成具有不同特性的焊料凸块。

    Fluxless soldering sample pretreating system
    6.
    发明授权
    Fluxless soldering sample pretreating system 失效
    无焊锡样品预处理系统

    公开(公告)号：US5499754A

    公开(公告)日：1996-03-19

    申请号：US339770

    申请日：1994-11-15

    申请人： Stephen M. Bobbio ,  Nicholas G. Koopman ,  Sundeep Nangalia

    发明人： Stephen M. Bobbio ,  Nicholas G. Koopman ,  Sundeep Nangalia

    IPC分类号： B23K1/20 ,  B23K35/38 ,  H05K3/34 ,  C23F1/02 ,  B23K3/08

    CPC分类号： B23K35/38 ,  B23K1/20 ,  B23K2201/36 ,  H05K3/3489

    摘要： A fluxless soldering sample pretreating system includes a sample chamber having an opening therein and a sample holder. A sample chamber extension extends outwardly from the opening to define a passageway from the sample chamber extension, through the opening, and into the sample chamber. A fluorine-containing gas is supplied into the sample chamber extension. Am energy source such as a microwave oven surrounds the sample chamber extension. The microwave oven produces microwave energy in the sample chamber extension to form a plasma therein and dissociate the fluorine-containing gas into atomic fluorine. A perforated aluminum plate extends transversely across the passageway and blocks the plasma from traversing the passageway from the sample chamber extension into the sample chamber, while allowing the atomic fluorine to traverse the passageway from the sample chamber extension into the sample holder. A second chamber extension, gas supply and microwave oven may be added to improve uniformity for large samples.

    摘要翻译： 无助焊剂样品预处理系统包括其中具有开口的样品室和样品保持器。 样品室延伸部从开口向外延伸以限定从样品室延伸部穿过开口并进入样品室的通道。 向样品室延伸部供给含氟气体。 诸如微波炉的能量源围绕样品室延伸。 微波炉在样品室延伸部中产生微波能量，在其中形成等离子体，并将含氟气体解离为原子氟。 穿孔铝板横向延伸穿过通道，并阻止等离子体横穿从样品室延伸部进入样品室的通道，同时允许原子氟穿过从样品室延伸部分进入样品架的通道。 可以添加第二室延伸，气体供应和微波炉以改善大样品的均匀性。

    Fluxless soldering of copper
    8.
    发明授权
    Fluxless soldering of copper 失效
    铜的无焊焊接

    公开(公告)号：US5407121A

    公开(公告)日：1995-04-18

    申请号：US155020

    申请日：1993-11-19

    申请人： Nicholas G. Koopman ,  Sundeep Nangalia

    发明人： Nicholas G. Koopman ,  Sundeep Nangalia

    IPC分类号： B23K1/20 ,  B23K35/38 ,  H05K3/34

    CPC分类号： B23K35/38 ,  B23K1/20 ,  B23K2201/36 ,  H05K3/3489

    摘要： A method of soldering a copper layer without the use of fluxing agents by exposing the copper layer to a fluorine-containing plasma. Solder is then placed onto the surface of the copper layer and reflowed. Reflow can take place at low temperatures, atmospheric pressure and in an inert or oxidizing atmosphere using standard solder reflow equipment.

    摘要翻译： 一种通过将铜层暴露于含氟等离子体而不使用助熔剂来焊接铜层的方法。 然后将焊料放置在铜层的表面上并回流。 回流可以使用标准的回流焊设备在低温，大气压和惰性或氧化性气氛中进行。

    Tacking processes and systems for soldering
    9.
    发明授权
    Tacking processes and systems for soldering 失效
    焊接工艺和系统

    公开(公告)号：US5992729A

    公开(公告)日：1999-11-30

    申请号：US724910

    申请日：1996-10-02

    申请人： Nicholas G. Koopman ,  Sundeep Nangalia

    发明人： Nicholas G. Koopman ,  Sundeep Nangalia

    IPC分类号： B23K1/06 ,  H05K3/34 ,  B23K1/20 ,  B23K31/02

    CPC分类号： B23K1/06 ,  H05K3/3436

    摘要： A first component is soldered to a second component by placing the first component on the second component with solder therebetween, then ultrasonically vibrating at least one of the first and second components to thereby tack the solder to at least one of the first and second components, and by reflowing the solder. Ultrasonic vibration of at least one of the first and second components to thereby tack the solder is preferably performed for less than one second. A component placer places the first component on the second component with solder therebetween. An ultrasonic vibrator ultrasonically vibrates at least one of the placed first and second components, to thereby tack the solder to at least one of the placed first and second components. A solder reflower reflows the tacked solder to thereby solder the first component to the second component.

    摘要翻译： 将第一部件焊接到第二部件上，通过将第一部件放置在第二部件上，在其间具有焊料，然后对第一和第二部件中的至少一个进行超声波振动，从而将焊料固定到第一和第二部件中的至少一个， 并通过回流焊料。 第一和第二组分中的至少一个的超声波振动优选地进行少于1秒。 组件放置器将第一部件放置在第二部件上，其间具有焊料。 超声波振动器超声振动放置的第一和第二部件中的至少一个，从而将焊料固定到所放置的第一和第二部件中的至少一个。 焊料回流焊机将固定的焊料回流，从而将第一部件焊接到第二部件。

    Method of forming differing volume solder bumps
    10.
    发明授权
    Method of forming differing volume solder bumps 失效
    形成不同体积的焊料凸块的方法

    公开(公告)号：US5381946A

    公开(公告)日：1995-01-17

    申请号：US127785

    申请日：1993-09-27

    申请人： Nicholas G. Koopman ,  Glenn A. Rinne ,  Iwona Turlik ,  Edward K. Yung

    发明人： Nicholas G. Koopman ,  Glenn A. Rinne ,  Iwona Turlik ,  Edward K. Yung

    IPC分类号： G01R31/26 ,  G01R31/28 ,  H01L21/326 ,  H01L21/66 ,  H01L23/58 ,  H01L21/60

    CPC分类号： G01R31/2863 ,  H01L22/32 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/16 ,  H01L2924/01014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15174 ,  H01L2924/15192 ,  Y10T29/49144

    摘要： An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips. Solder bumps with different characteristics may be formed by varying the current-time product to each individual pad of the temporary substrate during a plating operation.

    摘要翻译： 可以使用具有对应于芯片上的输入/输出焊盘的位置的衬底焊盘的临时衬底来测试其上具有焊料凸块的集成电路芯片，并且在临时衬底焊盘上具有牺牲导体层。 焊料凸点放置在相应的牺牲金属层附近，并被加热以在芯片和临时衬底之间形成电气和机械连接。 然后在临时衬底上测试和/或烧入芯片。 在测试/老化之后，通过加热将牺牲金属层溶解到焊料凸块中。 包括其中具有溶解的牺牲金属层的焊料凸块的集成电路芯片可以容易地从临时衬底移除。 也可以在临时衬底上形成焊料凸块并将其转移到未凸起的芯片。 可以通过在电镀操作期间通过改变临时衬底的每个单独衬垫的电流时间积来形成具有不同特性的焊料凸块。