公开(公告)号：US6157227A

公开(公告)日：2000-12-05

申请号：US993377

申请日：1997-12-18

申请人： Thierry Giovinazzi ,  David Naura

发明人： Thierry Giovinazzi ,  David Naura

IPC分类号： H03K17/22 ,  H03L7/00

CPC分类号： H03K17/223

摘要： A neutralization device to reset or inhibit at least certain electronic functions of an integrated circuit depending on the level of the supply voltage Vdd comprises a conditional feedback means to deactivate it especially in standby mode and then eliminate its consumption, and to reactivate it for certain modes of operation of the integrated circuit.

摘要翻译： 取决于电源电压Vdd的电平来重置或抑制集成电路的至少某些电子功能的中和装置包括条件反馈装置，其特别地在待机模式下停用它，然后消除其消耗，并且为某些模式重新激活 的集成电路的操作。

公开(公告)号：US4916298A

公开(公告)日：1990-04-10

申请号：US265230

申请日：1988-10-31

申请人： Moreno Raphael

发明人： Moreno Raphael

IPC分类号： G06K7/016 ,  G06K7/10

CPC分类号： G06K7/1093 ,  G06K7/0166

摘要： Disclosed is an improvement in methods for reading bar codes, enabling the codes to be read even under difficult conditions of uneven printing, stained background, poor contrast, cut bars etc. Instead of merely detecting light absorption or reflection spikes when a detector is moved in front of the code, where the presence of a bar is indicated when a threshold is exceeded, the following method is used: a matrix image of black and white pixels is set up; the sum Tj of black pixels of each column is counted to draw up a curve Tj as a function of the abscissa j of columns; a threshold SDA is established for Tj, below which, in principle, the columns do not contain a portion of a bar code bar; blocks of columns going beyond the threshold SDA are demarcated, and all the other columns of the image are eliminated; then shape recognition is carried out on the remaining blocks to ascertain whether the block truly corresponds to a bar or not. The value SDA is established by a recurrent computation that brings into play the ratio between surfaces Sinf and Ssup, above and below the threshold SDA in the curve Tj= f(j).

摘要翻译： 公开了用于读取条形码的方法的改进，即使在不均匀打印，染色背景，差的对比度，切割条等的困难条件下也能够读取代码。而不是仅在检测器移动时检测光吸收或反射尖峰 在代码的前面，当超过阈值时指示条的存在，使用以下方法：建立黑白像素的矩阵图像; 计算每列的黑色像素的和Tj，以绘制作为列的横轴j的函数的曲线Tj; 为Tj建立阈值SDA，原则上，列不包含条形码栏的一部分; 划分超过阈值SDA的列的块被划分，并且图像的所有其他列被消除; 然后对剩余的块执行形状识别，以确定块是否真的对应于条。 值SDA是通过一个循环计算建立的，该计算使曲线Tj = f（j）中的表面Sinf和Ssup之间的比值高于和低于阈值SDA。

公开(公告)号：US4896298A

公开(公告)日：1990-01-23

申请号：US147902

申请日：1988-01-25

申请人： Jacek Kowalski

发明人： Jacek Kowalski

IPC分类号： G11C17/00 ,  G11C7/24 ,  G11C16/06 ,  G11C16/24 ,  G11C16/26

CPC分类号： G11C16/24 ,  G11C16/26 ,  G11C7/24

摘要： A read circuit is disclosed for logic circuit type integrated circuits comprising a memory consisting of a matrix of memory cells. The memory cells are each addressable by rows and columns selected by row and column decoders. The read circuit, which is connected to the memory cells by a line called a bit line, comprises a pre-loading circuit for the bit line and a detection circuit that detects the discharging or non-discharging of the bit line depending on whether the memory cell selected is in the state "0" or "1", and also comprises a means to memorize the state that is read. The circuit further comprises means which make it possible, in read mode, to discharge the bit line regardless of whether the memory cell is in the state "1" or "0" and means that delay the moment of discharge. The invention can be applied to EPROMs or similar memories.

摘要翻译： 公开了一种用于逻辑电路型集成电路的读取电路，其包括由存储器单元矩阵组成的存储器。 存储单元可以由行和列解码器选择的行和列进行寻址。 通过称为位线的线路连接到存储单元的读取电路包括用于位线的预加载电路和检测电路，该电路根据存储器是否检测位线的放电或不放电 所选择的单元处于状态“0”或“1”，并且还包括用于存储读取的状态的装置。 该电路还包括使得在读取模式下可以放电位线的装置，而不管存储器单元是处于“1”还是“0”，并且意味着延迟放电时刻。 本发明可以应用于EPROM或类似的存储器。

公开(公告)号：US5467053A

公开(公告)日：1995-11-14

申请号：US286485

申请日：1994-08-04

申请人： Sylvie Wuidart ,  Tien-Dung Do

发明人： Sylvie Wuidart ,  Tien-Dung Do

IPC分类号： H03K5/19 ,  H03K5/1252 ,  H03K5/13 ,  H03K3/017 ,  H03K5/14

CPC分类号： H03K5/1252 ,  H03K5/133

摘要： A circuit for the filtering of a pulse signal comprises means to detect an output pulse upon the detection of an input pulse, the shape of this output pulse being based on elementary delays obtained by the charging and discharging of capacitors. During the generation of the output pulse, no new input pulse can be taken into account.

摘要翻译： 用于滤波脉冲信号的电路包括在检测输入脉冲时检测输出脉冲的装置，该输出脉冲的形状基于通过电容器的充电和放电获得的基本延迟。 在产生输出脉冲期间，不能考虑新的输入脉冲。

公开(公告)号：US5066853A

公开(公告)日：1991-11-19

申请号：US247085

申请日：1988-09-20

申请人： Pierre Brisson

发明人： Pierre Brisson

IPC分类号： G06K17/00 ,  G06Q10/00 ,  G07B15/04 ,  G07C9/00 ,  G07F7/00 ,  G07F7/08 ,  G07F7/10

CPC分类号： G06Q20/4093 ,  G06Q10/02 ,  G06Q20/127 ,  G06Q20/341 ,  G06Q20/363 ,  G07B15/04 ,  G07C9/00119 ,  G07F17/0014 ,  G07F17/0042 ,  G07F17/24 ,  G07F7/0866 ,  G07F7/1008

摘要： To reserve a supply of a good or service, a chip type memory card is inserted into a terminal of a reserving device. This reserving device makes the reservation by sending indications about this reservation to a terminal located near the goods or services to be delivered. On the agreed date and at the agreed place, the renting party goes to this terminal and inserts his memory card therein. The terminal then tells him where and how he should get and use the service or good reserved by him. This system can be applied in particular when the good or service to be obtained by self-service concerns the renting of a vehicle.

摘要翻译： 为了保留商品或服务的供应，将芯片型存储卡插入到预留装置的终端中。 该保留装置通过将该预约的指示发送到位于要交付的商品或服务附近的终端进行预约。 在约定的日期和约定的地点，租赁方到达这个终端，并将其存储卡插入其中。 然后终端告诉他他应该得到什么和如何使用他的服务或保留的好处。 该系统可以特别适用于通过自助服务获得的商品或服务涉及车辆的租赁。

公开(公告)号：US4920279A

公开(公告)日：1990-04-24

申请号：US250392

申请日：1988-09-28

申请人： Pascal Charlet ,  Eric Lauverjat ,  Rafael Moreno

发明人： Pascal Charlet ,  Eric Lauverjat ,  Rafael Moreno

IPC分类号： G01R13/30 ,  H03G7/00 ,  H03K5/007 ,  H03K5/01 ,  H03K5/12

CPC分类号： G01R13/305 ,  H03G7/007 ,  H03K5/007 ,  H03K5/01 ,  H03K5/12

摘要： A method for enlarging part of an analog input signal, and a circuit to implement this method. The circuit includes an amplifier which receives the analog input signal, the gain of which is controlled by a programming signal which varies as a function of the leading edge of the analog input signal and of a maximum threshold of the output signal from the circuit. A subtractor receives a substraction signal which is a function of an upper threshold and a lower threshold of the output signal from the circuit, and a signal from the amplifier, and then provides the output signal from the circuit.

摘要翻译： 一种用于放大模拟输入信号的一部分的方法，以及实现该方法的电路。 电路包括放大器，其接收模拟输入信号，其增益由作为模拟输入信号的前沿的函数和来自电路的输出信号的最大阈值而变化的编程信号控制。 减法器接收作为来自电路的输出信号的上阈值和下阈值的函数的减法信号和来自放大器的信号，然后提供来自电路的输出信号。

公开(公告)号：US5014312A

公开(公告)日：1991-05-07

申请号：US297079

申请日：1989-01-13

申请人： Gilles Lisimaque ,  Yvon Bahout

发明人： Gilles Lisimaque ,  Yvon Bahout

IPC分类号： G06F12/14 ,  G06F21/02 ,  G06F21/24 ,  G06K17/00 ,  G06K19/073 ,  G06Q20/34 ,  G06Q20/36 ,  G06Q20/38 ,  G07F7/10

CPC分类号： G07F7/1008 ,  G06Q20/3558 ,  G06Q20/3672 ,  G06Q20/3829

摘要： The use of chip cards, with the level of security of the type associated with chip cards of the type used by banks, is extended to move widespread use by organizing a secure dispatch of blank chip cards to customers wishing to program specific applications therein. The system consists in sending this customer the blank chip card itself and a programming access key to this card, by separate routes. To prevent any additional risks, the access key is itself enciphered and can be deciphered only be a deciphering element in the possession of the customer. The card can then be programmed only if this card is confronted with its deciphering key.

摘要翻译： 使用具有与银行使用的类型的芯片卡相关联类型的安全级别的芯片卡被扩展以通过组织对希望在其中编程特定应用的客户的安全调度的空白芯片卡来进行广泛使用。 该系统包括通过单独的路由将该客户的空芯片卡本身和编程访问密钥发送到该卡。 为了防止任何额外的风险，访问密钥本身被加密，并且可以被解密，只能是客户拥有的解密元素。 只有当此卡面对其解密密钥时，才能对该卡进行编程。

公开(公告)号：US4958324A

公开(公告)日：1990-09-18

申请号：US269169

申请日：1988-11-09

申请人： Jean Devin

发明人： Jean Devin

IPC分类号： G11C17/00 ,  G11C29/00 ,  G11C29/12 ,  G11C29/50

CPC分类号： G11C29/50 ,  G11C16/04 ,  G11C2029/5006

摘要： A method for testing electrically programmable memories is disclosed. To enable the measurement of the current of programmed cells and blank cells (and not only to check whether the cells are programmed or not), and to enable this measurement even after the memory has been encapsulated in a package, it is proposed herein to connect, in testing mode, the bit line of a cell to be tested with the programming terminals to which there is applied, in programming mode, the programming high voltage Vpp. A low voltage Vte is applied to this terminal in testing mode, and the current flowing between this terminal and the voltage source is measured. This current is the current of the tested cell.

摘要翻译： 公开了一种用于测试电可编程存储器的方法。 为了能够测量编程的单元和空白单元的电流（并且不仅要检查单元是否被编程），并且即使在存储器被封装在封装中之后也能够进行该测量，因此在此建议连接 在测试模式下，在编程模式下编程高电压Vpp时，要应用要编程的端子进行测试的单元的位线。 在测试模式下，向该端子施加低电压Vte，并且测量在该端子与电压源之间流动的电流。 该电流是测试电池的电流。

公开(公告)号：US4941257A

公开(公告)日：1990-07-17

申请号：US283305

申请日：1988-12-12

申请人： Jean-Pierre Gloton

发明人： Jean-Pierre Gloton

IPC分类号： H01L21/60 ,  B41F17/36 ,  B42D15/10 ,  G06K19/077 ,  H01L23/498 ,  H05K3/32

CPC分类号： H01L23/49855 ,  G06K19/07743 ,  G06K19/07745 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49171 ,  Y10T29/49144

摘要： A method for positioning an electronic component and its contacts on a card is disclosed. The electronic component is first of all placed in the cavity of the card, then the electrical contacts are placed on the card and electrically connected to the output terminals by a so-called tape automatic bonding process using a film on which the electrical contacts are deposited.

摘要翻译： 公开了一种将电子部件及其触点定位在卡上的方法。 首先将电子部件放置在卡的腔中，然后通过所谓的胶带自动接合工艺将电触点放置在卡上并与输出端电连接，使用其上沉积有电触点的膜 。

公开(公告)号：US4939385A

公开(公告)日：1990-07-03

申请号：US290141

申请日：1988-12-27

申请人： Bruno Dubujet

发明人： Bruno Dubujet

IPC分类号： H01L21/822 ,  H01L27/04 ,  H03K3/3565 ,  H03K17/22 ,  H03K17/687 ,  H03K19/00 ,  H03K19/003

CPC分类号： H03K17/223 ,  H03K3/3565

摘要： The present invention relates to a reenergizing circuit designed to start a MOS technology integrated circuit. It comprises a power supply terminal, a ground terminal and an output terminal, a first capacitor which is connected between the ground terminal and a circuit node; the capacitor has a charge which is controlled by means of a first p-type transistor which is connected between the power terminal and the circuit node. It further comprises an inverter gate which has a modifiable threshold voltage whose input terminal is connected to the circuit node, an inverter connected between the output terminal of the inverter gate and the output terminal, a current source which is connected in series to a divider circuit controlling the first p-type transistor and a circuit (C) having a transfer function V.sub.S =f (V.sub.E) of the inverter type, said circuit (C) being connected between the output terminal of the inverter gate and the current source in order to control the operation of the current source.

摘要翻译： 本发明涉及一种设计用于启动MOS技术集成电路的再激励电路。 它包括电源端子，接地端子和输出端子，连接在接地端子和电路节点之间的第一电容器; 电容器具有通过连接在电源端子和电路节点之间的第一p型晶体管来控制的电荷。 它还包括一个反相器门，其具有可变化的阈值电压，其输入端连接到电路节点，连接在反相器门的输出端和输出端之间的反相器，串联连接到除法器电路的电流源 控制第一p型晶体管和具有变换器类型的传递函数VS = f（VE）的电路（C），所述电路（C）连接在反相器门的输出端和电流源之间，以便 控制电流源的运行。