公开(公告)号：US09778642B2

公开(公告)日：2017-10-03

申请号：US12045849

申请日：2008-03-11

Applicant: Marco Hofmann ,  Harry Knechtel ,  Gunnar Hettstedt ,  Marc Lindlbauer

Inventor： Marco Hofmann ,  Harry Knechtel ,  Gunnar Hettstedt ,  Marc Lindlbauer

IPC: G06F21/00 ,  G05B19/042

CPC classification number: G05B19/0425 ,  G05B2219/23215 ,  G05B2219/23464 ,  G05B2219/24155 ,  G05B2219/24211 ,  G05B2219/2637

Abstract: A data-processing system having at least one operating memory holding operating data is provided with a protection unit having an execution environment protected from unauthorized access. At least one monitoring logic in the execution environment is connected to the operating memory for monitoring unauthorized modifications, access, or similar protection violations of the operating data stored in the operating memory and for generating an output on detection of such a protection violation. A protection logic in the execution environment holds replacement data capable of replacing the operating data and is connected to the monitoring logic for, on generation of the output, providing to the operating memory the replacement data for the operation or for a substitute operation of the data-processing system.

公开(公告)号：US4869184A

公开(公告)日：1989-09-26

申请号：US226405

申请日：1988-07-29

Applicant: Michio Hisatake ,  Takeshi Kongo ,  Hidenori Sasako

Inventor： Michio Hisatake ,  Takeshi Kongo ,  Hidenori Sasako

IPC: D05B21/00 ,  D05B19/06 ,  D05C5/04 ,  G05B19/042 ,  G05B19/12

CPC classification number: D05B19/06 ,  G05B19/042 ,  G05B19/12 ,  G05B2219/23215 ,  G05B2219/23342 ,  G05B2219/23344 ,  G05B2219/24009 ,  G05B2219/24014 ,  G05B2219/24045

Abstract: An embroidering machine includes RAM which stores temporally the embroidering data read out from a memory card; a device which detects attaching or detaching of the memory card; a buffer circuit which makes and breaks a power source and buses for the memory card; an indicator or warning device which indicates the circuit making and breaking; a device for double checking the data sent from the memory card to RAM; and a device which indicates to the operator the presence of a required card. In the detector of the memory card, determined detecting edge terminals of the memory card are made shorter, and when the card is detached the circuits of the detecting terminals are disconnected earlier than the remaining circuits. When the circuit of the detecting terminal is disconnected, the port of the circuit is rendered to be high impedance by the buffer circuit and the power source to the memory card is disconnected before the terminal of the power source and the bus of the memory card are disconnected, so that if the memory card is slipped out from the embroidering machine while processing "ACCESS" of the memory card, the memory IC is not destroyed.

Abstract translation: 刺绣机包括RAM，其暂时存储从存储卡读出的绣花数据; 检测存储卡的附接或拆卸的装置; 缓冲电路，用于断开存储卡的电源和总线; 表示电路制作和断线的指示器或警告装置; 用于双重检查从存储卡发送到RAM的数据的装置; 以及向操作者指示存在所需卡的设备。 在存储卡的检测器中，确定存储卡的检测边缘端子变得更短，并且当卡被分离时，检测端子的电路比剩余电路早。 当检测端子的电路断开时，缓冲电路使电路的端口变为高阻抗，并且在电源端和存储卡的总线之前断开存储卡的电源 断开连接，使得如果存储卡在处理存储卡“ACCESS”时从绣花机中滑出，则存储器IC不会被破坏。

公开(公告)号：US4402057A

公开(公告)日：1983-08-30

申请号：US1168

申请日：1979-01-05

Applicant: Tomio Itou ,  Masanori Mizote

Inventor： Tomio Itou ,  Masanori Mizote

IPC: G06F12/16 ,  F02P5/15 ,  G05B19/042 ,  G06F1/26 ,  G06F1/28 ,  G06F1/30 ,  G06F11/00 ,  G06F11/14 ,  G06F11/16 ,  G06F17/00 ,  G07C5/10 ,  G06F7/00

CPC classification number: G06F11/167 ,  F02P5/151 ,  G05B19/0428 ,  G06F11/0763 ,  G06F11/1441 ,  G07C5/10 ,  G05B2219/23215 ,  G05B2219/24139 ,  Y02T10/46

Abstract: A reference check bit pattern is stored in a nonvolatile storage medium of a vehicle-mounted microcomputer. A portion of a volatile storage medium is allocated for the purpose of storing the reference check bits. The microcomputer is programmed to compare the check bits stored in both the volatile and nonvolatile storage mediums. In response to a command signal, a mismatch is detected between the reference check bits of the volatile and nonvolatile mediums to indicate that data stored in the volatile memory have failed due to a power outage. The failed check data of the volatile memory is rewritten with the reference check data in the nonvolatile memory for later comparison. At the same time all data stored in the remaining portion of the volatile memory is erased so the remaining portion can accept a set of fresh input data. When a match occurs the computer proceeds with the normal computing functions.

Abstract translation: 参考校验位模式存储在车载微型计算机的非易失性存储介质中。 分配易失性存储介质的一部分用于存储参考校验位。 微型计算机被编程为比较存储在易失性和非易失性存储介质中的校验位。 响应于命令信号，在易失性和非易失性介质的参考校验位之间检测到失配，以指示存储在易失性存储器中的数据由于断电而失败。 易失性存储器的故障检查数据用非易失性存储器中的参考校验数据重新写入以供稍后比较。 同时，存储在易失性存储器的剩余部分中的所有数据被擦除，使得剩余部分可以接受一组新的输入数据。 当匹配发生时，计算机进行正常的计算功能。

公开(公告)号：US20080235473A1

公开(公告)日：2008-09-25

申请号：US12045849

申请日：2008-03-11

Applicant: Marco HOFMANN ,  Harry Knechtel ,  Gunnar Hettstedt ,  Marc Lindlbauer

Inventor： Marco HOFMANN ,  Harry Knechtel ,  Gunnar Hettstedt ,  Marc Lindlbauer

IPC: G06F12/00

CPC classification number: G05B19/0425 ,  G05B2219/23215 ,  G05B2219/23464 ,  G05B2219/24155 ,  G05B2219/24211 ,  G05B2219/2637

Abstract: A data-processing system having at least one operating memory holding operating data is provided with a protection unit having an execution environment protected from unauthorized access. At least one monitoring logic in the execution environment is connected to the operating memory for monitoring unauthorized modifications, access, or similar protection violations of the operating data stored in the operating memory and for generating an output on detection of such a protection violation. A protection logic in the execution environment holds replacement data capable of replacing the operating data and is connected to the monitoring logic for, on generation of the output, providing to the operating memory the replacement data for the operation or for a substitute operation of the data-processing system.

Abstract translation: 具有保存操作数据的至少一个操作存储器的数据处理系统具有保护单元，该保护单元具有防止未授权访问的执行环境。 执行环境中的至少一个监控逻辑连接到操作存储器，用于监视存储在操作存储器中的操作数据的未经授权的修改，访问或类似的保护违反，并且用于在检测到这种保护违规时生成输出。 执行环境中的保护逻辑保持能够替换操作数据的替换数据，并且连接到监控逻辑，以便在产生输出时向操作存储器提供用于操作的替换数据或数据的替换操作 处理系统。

公开(公告)号：US5708589A

公开(公告)日：1998-01-13

申请号：US629232

申请日：1996-04-08

Applicant: David L. Beauvais

Inventor： David L. Beauvais

IPC: G05B19/042 ,  G06F11/14 ,  G06F1/18 ,  G06F1/28 ,  H02J1/00 ,  H02J3/14

CPC classification number: G06F11/1441 ,  G05B19/0428 ,  G05B2219/23215 ,  G05B2219/23308 ,  Y10T307/438 ,  Y10T307/461 ,  Y10T307/477 ,  Y10T307/484

Abstract: A data protection and recovery system for an energy controller for a water heater is disclosed. The energy controller is a microprocessor based system which includes a central processing unit, volatile and non-volatile memories, and a clock. It functions to energize the water heater only during a certain period of the day. During normal operation of the system, the system uses the volatile memory as a workspace, and normally copies data in the volatile memory to the non-volatile memory. The system senses electrical disturbances, such as power surges, and prevents the writing of any data to the non-volatile memory components during the electrical disturbance. After the electrical disturbance subsides, the system checks the integrity of the data written to the volatile memory, and if it was not corrupted by the electrical disturbance, the data is then written to the non-volatile memory. If the data in the volatile memory was corrupted by the electrical disturbance, the system copies the data from the non-volatile memory to the volatile memory, and the system is restarted.

Abstract translation: 公开了一种用于热水器的能量控制器的数据保护和恢复系统。 能量控制器是基于微处理器的系统，其包括中央处理单元，易失性和非易失性存储器以及时钟。 它只能在一天中的一段时间内为热水器通电。 在系统的正常操作期间，系统使用易失性存储器作为工作区，并且通常将易失性存储器中的数据复制到非易失性存储器。 该系统感测电力干扰（例如功率浪涌），并防止在电气干扰期间将任何数据写入非易失性存储器组件。 电气干扰消失后，系统检查写入易失性存储器的数据的完整性，如果没有被电气干扰损坏，则将数据写入非易失性存储器。 如果易失性存储器中的数据被电气干扰所破坏，则系统将数据从非易失性存储器复制到易失性存储器，并重新启动系统。

公开(公告)号：US4972340A

公开(公告)日：1990-11-20

申请号：US881408

申请日：1986-07-02

Applicant: Kunito Nakatsuru ,  Masaaki Fujisawa ,  Taiji Hasegawa

Inventor： Kunito Nakatsuru ,  Masaaki Fujisawa ,  Taiji Hasegawa

IPC: F02D45/00 ,  G05B19/042

CPC classification number: G05B19/042 ,  G05B2219/23215 ,  G05B2219/25435

Abstract: An engine control system has a CPU (central processing unit), a ROM (read-only memory) and a RAM (random-access memory) backed up by a power supply. Only in the case where the difference between the data in the RAM and that in the ROM is within a predetermined range will the engine control inputs be regulated by use of the data in the RAM.

Abstract translation: 发动机控制系统具有由电源备份的CPU（中央处理单元），ROM（只读存储器）和RAM（随机存取存储器）。 只有在RAM中的数据与ROM中的数据之间的差异在预定范围内的情况下，才能通过使用RAM中的数据来调节引擎控制输入。

公开(公告)号：US4751633A

公开(公告)日：1988-06-14

申请号：US710171

申请日：1985-03-11

Applicant: Michael Henn ,  Walter Hersel ,  Siegfried Hertzler ,  Rudiger Jautelat ,  Werner Jundt ,  Gunther Kaiser ,  Michael Kirschner ,  Dieter Mayer ,  Klaus-Gerd Meyer ,  Manfred Mezger

Inventor： Michael Henn ,  Walter Hersel ,  Siegfried Hertzler ,  Rudiger Jautelat ,  Werner Jundt ,  Gunther Kaiser ,  Michael Kirschner ,  Dieter Mayer ,  Klaus-Gerd Meyer ,  Manfred Mezger

IPC: B60R16/02 ,  F02D41/24 ,  F02D41/26 ,  F02D45/00 ,  G05B15/02 ,  G05B19/042 ,  G06F9/445 ,  G06F11/14 ,  G06F13/42 ,  G11C16/10 ,  G06F15/20 ,  G06F12/14

CPC classification number: G06F8/665 ,  F02D41/249 ,  F02D41/266 ,  G05B19/0426 ,  G06F11/1402 ,  G06F13/4213 ,  G11C16/102 ,  G05B2219/23215 ,  G05B2219/23345 ,  G05B2219/25153 ,  G05B2219/25154 ,  G05B2219/25178

Abstract: To prevent change of data in a non-volatile programmable, ready-only memory (25) forming, together with a microprocessor (23) a control unit, for example for an automotive vehicle, while permitting programming of the memory from an external programming unit (P, 1), an interface (3, 11, 12) is provided through which a release-enable bus (13) also passes, data being transmitted in accordance with a predetermined characteristic--even or odd parity--, the parity correctness being checked. If the parity is correct, an "enter" signal is provided on the release-enable bus for storing the data; if not, retransmission is attempted for a predetermined number of time, and if it cannot be correctly effected, a malfunction indication output signal is generated.

Abstract translation: 为了防止在非易失性可编程准备存储器（25）中的数据的改变，与微处理器（23）一起形成例如用于机动车辆的控制单元，同时允许来自外部编程单元的存储器的编程 （P，1），提供了一个接口（3,11,12），释放使能总线（13）也通过该接口，根据预定的特征均匀奇偶校验发送数据，奇偶校验正确性为 检查。 如果奇偶校验正确，则在释放使能总线上提供用于存储数据的“输入”信号; 如果不是，则尝试进行预定次数的重发，如果不能正确地进行，则产生故障指示输出信号。

公开(公告)号：US20070226694A1

公开(公告)日：2007-09-27

申请号：US11643393

申请日：2006-12-20

Applicant: Marc Neufeld ,  Juergen Hummel

Inventor： Marc Neufeld ,  Juergen Hummel

IPC: G06F9/44

CPC classification number: G05B19/042 ,  F02D41/266 ,  G05B2219/23213 ,  G05B2219/23215 ,  G05B2219/24034 ,  G05B2219/24042 ,  G05B2219/24155 ,  G05B2219/2637 ,  G06F21/57 ,  G06F21/64

Abstract: A control unit for a machine includes a processor and a memory for program instructions and parameter values. A first portion of the program instructions defines a first process which accesses the parameter values in order to ascertain control information and to transmit same to the machine, and a second portion defines a second process which evaluates the quality of the application data, and either permits or prevents the execution of the first process based on the evaluation results. The second process checks whether the value of at least one first physical parameter specified by the application data is valid and does not permit execution of the first process using these application data unless the value of the parameter has been determined to be valid.

Abstract translation: 机器的控制单元包括处理器和用于程序指令和参数值的存储器。 程序指令的第一部分定义了访问参数值以便确定控制信息并将其发送到机器的第一过程，第二部分定义了评估应用数据质量的第二过程，并且允许 或者基于评估结果来阻止第一处理的执行。 第二过程检查由应用数据指定的至少一个第一物理参数的值是否有效，并且不允许使用这些应用数据执行第一进程，除非该参数的值被确定为有效。

公开(公告)号：US5497330A

公开(公告)日：1996-03-05

申请号：US255898

申请日：1994-06-07

Applicant: Yasuhiko Ishida

Inventor： Yasuhiko Ishida

IPC: F02D45/00 ,  F02D41/04 ,  F02D41/24 ,  G05B19/042 ,  G06F19/00 ,  G06F7/00

CPC classification number: F02D41/249 ,  G05B19/0428 ,  F02D41/042 ,  G05B2219/23215

Abstract: A method of storing a correction value of a control variable in an engine control device includes the steps of transferring a correction value stored in a RAM to an E.sup.2 PROM by serial communication immediately after a power supply switch is turned off. The correction value stored in the E.sup.2 PROM is then transferred back to the RAM immediately after the power supply circuit is turned on. In this way, when the engine control device is not in operation, the correction value is retained in the E.sup.2 PROM.

Abstract translation: 将控制变量的校正值存储在发动机控制装置中的方法包括以下步骤：在电源开关断开之后立即通过串行通信将存储在RAM中的校正值传送到E2PROM。 存储在E2PROM中的校正值然后在电源电路接通之后立即传送回RAM。 这样，当发动机控制装置不工作时，校正值被保留在E2PROM中。

公开(公告)号：US5351216A

公开(公告)日：1994-09-27

申请号：US26908

申请日：1993-03-05

Applicant: Tom Salt ,  Rodney Drake ,  Ray Allen

Inventor： Tom Salt ,  Rodney Drake ,  Ray Allen

IPC: G05B19/042 ,  G06F11/14 ,  G11C16/22 ,  G06K5/00

CPC classification number: G05B19/0428 ,  G06F11/1402 ,  G11C16/22 ,  G05B2219/23215 ,  G05B2219/23345 ,  G05B2219/25301

Abstract: A single chip, semiconductor microcontroller device is adapted to control an aspect of the operation of an external system. The device includes a CPU, program memory for storing instructions to be selectively executed by the CPU to perform the control functions, and peripheral EEPROM data memory adapted to be written to for storing selected data in selected ones of a multiplicity of addresses of the data memory and for selective retrieval of the stored dam by the CPU within its control function. Internal logic in the device is implemented to abort a write operation in progress on the EEPROM data memory upon occurrence of an asynchronous reset of the device. An error flag is set by the logic to indicate that the write operation is being aborted, and the data that was partially written to the EEPROM memory at the time the write operation was aborted is held intact.

Abstract translation: 单芯片半导体微控制器装置适于控制外部系统的操作的一个方面。 该装置包括CPU，用于存储由CPU选择性地执行以执行控制功能的指令的程序存储器，以及适于被写入以便将选择的数据存储在数据存储器的多个地址中的选定数据中的外围EEPROM数据存储器 并且用于在其控制功能内由CPU选择性地检索存储的水坝。 器件的内部逻辑被实现为在器件的异步复位发生时中止EEPROM数据存储器上正在进行的写入操作。 由逻辑设置错误标志以指示写入操作正在中止，并且在写入操作中止时部分写入EEPROM存储器的数据保持不变。