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    Bias control circuit and power amplification module
    1.
    发明授权
    Bias control circuit and power amplification module 有权

    公开(公告)号：US09912300B2

    公开(公告)日：2018-03-06

    申请号：US15435442

    申请日：2017-02-17

    申请人： Murata Manufacturing Co., Ltd.

    发明人： Yoshiaki Harasawa ,  Fuminori Morisawa

    IPC分类号： H03F1/30 ,  H03F3/24 ,  H03F3/04 ,  H03F1/52

    CPC分类号： H03F1/30 ,  G05F3/20 ,  H03F1/301 ,  H03F3/245 ,  H03F2200/451 ,  H03F2200/528 ,  H03F2200/555

    摘要： Provided is a bias control circuit that includes: a reference voltage circuit that generates a reference voltage; a resistor; a temperature dependent current generating circuit that generates a temperature dependent current, which changes depending on temperature, on the basis of the reference voltage and that supplies the temperature dependent current to one end of the resistor; a reference voltage buffer circuit that applies the reference voltage to the other end of the resistor; a constant current generating circuit that generates a constant current, which is for driving the reference voltage buffer circuit, on the basis of the reference voltage and that supplies the constant current to the other end of the resistor; and a bias generating circuit that generates a bias voltage or a bias current for a power amplification circuit on the basis of the voltage at the one end of the resistor.

    REFERENCE CIRCUITS FOR BIASING RADIO FREQUENCY ELECTRONICS
    2.
    发明申请
    REFERENCE CIRCUITS FOR BIASING RADIO FREQUENCY ELECTRONICS 审中-公开
    偏置无线电频率电路参考电路

    公开(公告)号：US20160336979A1

    公开(公告)日：2016-11-17

    申请号：US15222761

    申请日：2016-07-28

    申请人： SKYWORKS SOLUTIONS, INC.

    发明人： Ziv Alon ,  Aleksey A. Lyalin ,  Jing Sun ,  Tin Wai Kwan

    IPC分类号： H04B1/04 ,  H03F3/213 ,  G05F3/26 ,  H03F3/195

    CPC分类号： H04B1/0475 ,  G05F3/20 ,  G05F3/267 ,  G05F3/30 ,  H03F3/195 ,  H03F3/213 ,  H03F3/24 ,  H03F2200/171 ,  H03F2200/451 ,  H03F2200/528 ,  H03F2200/555 ,  H04B2001/0408

    摘要： Reference circuits for biasing radio frequency electronics are provided herein. In certain implementations, a gallium arsenide die includes a power amplifier configured to provide amplification to a signal, a reference voltage circuit including an output terminal that provides a reference voltage, and a mirror circuit configured to bias the power amplifier based on the reference voltage. The reference voltage circuit includes a bipolar transistor, a field effect transistor, and a circuit portion that generates a voltage that is proportional to absolute temperature. The reference voltage circuit generates the reference voltage based on a sum of a base-to-emitter voltage of the bipolar transistor, a turn-on voltage of the field effect transistor, and the voltage that is proportional to absolute temperature.

    摘要翻译： 本文提供了用于偏置射频电子设备的参考电路。 在某些实施方案中，砷化镓晶片包括功率放大器，其被配置为向信号提供放大，参考电压电路包括提供参考电压的输出端子以及配置为基于参考电压偏置功率放大器的反射镜电路。 参考电压电路包括双极晶体管，场效应晶体管和产生与绝对温度成比例的电压的电路部分。 参考电压电路基于双极晶体管的基极 - 发射极电压，场效应晶体管的导通电压和与绝对温度成正比的电压之和产生参考电压。

    BIAS CONTROL CIRCUIT AND POWER AMPLIFICATION MODULE
    6.
    发明申请
    BIAS CONTROL CIRCUIT AND POWER AMPLIFICATION MODULE 有权

    公开(公告)号：US20170179892A1

    公开(公告)日：2017-06-22

    申请号：US15435442

    申请日：2017-02-17

    申请人： Murata Manufacturing Co., Ltd.

    发明人： Yoshiaki HARASAWA ,  Fuminori MORISAWA

    IPC分类号： H03F1/30 ,  H03F3/24

    CPC分类号： H03F1/30 ,  G05F3/20 ,  H03F1/301 ,  H03F3/245 ,  H03F2200/451 ,  H03F2200/528 ,  H03F2200/555

    摘要： Provided is a bias control circuit that includes: a reference voltage circuit that generates a reference voltage; a resistor; a temperature dependent current generating circuit that generates a temperature dependent current, which changes depending on temperature, on the basis of the reference voltage and that supplies the temperature dependent current to one end of the resistor; a reference voltage buffer circuit that applies the reference voltage to the other end of the resistor; a constant current generating circuit that generates a constant current, which is for driving the reference voltage buffer circuit, on the basis of the reference voltage and that supplies the constant current to the other end of the resistor; and a bias generating circuit that generates a bias voltage or a bias current for a power amplification circuit on the basis of the voltage at the one end of the resistor.

    Zero Drift, Limitless and Adjustable Reference Voltage Generation
    7.
    发明申请
    Zero Drift, Limitless and Adjustable Reference Voltage Generation 有权
    零漂移，无限和可调参考电压产生

    公开(公告)号：US20160299519A1

    公开(公告)日：2016-10-13

    申请号：US15094459

    申请日：2016-04-08

    申请人： PR Electronics A/S

    发明人： Dan Vinge Madsen ,  Stig Alnøe Lindemann

    IPC分类号： G05F1/46 ,  H03K7/08 ,  H03K5/007

    CPC分类号： G05F1/468 ,  H02M3/157 ,  H03F3/347 ,  H03F3/393 ,  H03F3/45475 ,  H03F2200/135 ,  H03F2200/144 ,  H03F2200/156 ,  H03F2200/159 ,  H03F2200/165 ,  H03F2200/264 ,  H03F2200/297 ,  H03F2200/351 ,  H03F2200/372 ,  H03F2200/375 ,  H03F2200/528 ,  H03F2203/45512 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45531 ,  H03F2203/45534 ,  H03F2203/45536 ,  H03F2203/45594 ,  H03F2203/45631 ,  H03F2203/45701 ,  H03G3/3021 ,  H03K5/007 ,  H03K7/08 ,  H03M1/822

    摘要： A circuit for generation of a reference voltage for an electronic system, which circuit comprises at least one digital buffer (U21, U31, U32, U41, U51), a low pass filter (R21, C21; R31, C31; R41, C41; R51, C51) and an operational amplifier (OA21, OA31, OA41, OA51)), which circuit is adapted to revive an input in the form of a bandgap reference voltage into the digital buffer, which digital buffer is adapted to receive a digital input from a Pulse Width Modulated (PWM) signal, which digital buffer is adapted to generate an output signal adapted to be fed to the low pass filter, which output signal after filtration is adapted to be fed to a positive input terminal of the operational amplifier, which operational amplifier comprises a feedback circuit, which feedback circuit comprises at least one capacitor (C22, C32, C44, C54) adapted to be connected from an output terminal of the operational amplifier towards a negative input terminal of the operational amplifier so as to form an integrator, wherein the feedback circuit further comprises at least one chopped signal path (R22, S21; R33, R34, S32; R33, R35, C35, S31), which chopped signal is adapted to be modulated by the output signal of the digital buffer.

    摘要翻译： 用于产生电子系统的参考电压的电路，该电路包括至少一个数字缓冲器（U21，U31，U32，U41，U51），低通滤波器（R21，C21; R31，C31; R41，C41; R51，C51）和运算放大器（OA21，OA31，OA41，OA51）），该电路适于将带隙参考电压形式的输入恢复到数字缓冲器中，该数字缓冲器适于接收数字输入 来自脉宽调制（PWM）信号，该数字缓冲器适于产生适于馈送到低通滤波器的输出信号，滤波后的输出信号适于馈送到运算放大器的正输入端， 该运算放大器包括反馈电路，该反馈电路包括适于从运算放大器的输出端子向运算放大器的负输入端连接的至少一个电容器（C22，C32，C44，C54），以形成 一个整合 其中所述反馈电路还包括至少一个斩波信号路径（R22，S21; R33，R34，S32; R33，R35，C35，S31），该斩波信号适于由数字缓冲器的输出信号调制。