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    Multi-level memory cell
    1.
    发明授权
    Multi-level memory cell 有权
    多级存储单元

    公开(公告)号：US06480414B1

    公开(公告)日：2002-11-12

    申请号：US09586835

    申请日：2000-06-05

    申请人： Hong Chin Lin ,  Shyh-Chyi Wong ,  Tai-Yuan Chen

    发明人： Hong Chin Lin ,  Shyh-Chyi Wong ,  Tai-Yuan Chen

    IPC分类号： G11C1604

    CPC分类号： G11C16/0475 ,  G11C11/5621 ,  G11C16/0458 ,  G11C2211/5612 ,  G11C2211/5613

    摘要： A multi-level memory cell has a substrate, a first floating gate, a second floating gate and a control gate. A first doped region, a second doped region and a channel region located between the first doped region and the second doped region are provided in the substrate. The first floating gate is located over the channel region near the first doped region. The second floating gate is located over the channel region near the second doped region and isolated from the first floating gate. A control gate is located over the first and the second floating gates. When writing operations are proceeding, the bias voltages of the control gates are the same, and a constant bias voltage is provided on the first doped region or the second doped region depending on which binary states 11, 10, 01 or 00 are to write. Furthermore, the same bias voltage is used on the control gate during writing operation. Thus, the memory per unit chip area is enhanced and the peripheral circuits are simplified.

    摘要翻译： 多级存储单元具有衬底，第一浮动栅极，第二浮动栅极和控制栅极。 位于第一掺杂区和第二掺杂区之间的第一掺杂区，第二掺杂区和沟道区设置在衬底中。 第一浮栅位于靠近第一掺杂区的沟道区之上。 第二浮栅位于靠近第二掺杂区的沟道区上方并与第一浮栅隔离。 控制栅极位于第一和第二浮动栅极之上。 当写入操作进行时，控制栅极的偏置电压相同，并且根据要写入的二进制状态11,10,21或00，在第一掺杂区域或第二掺杂区域上提供恒定的偏置电压。 此外，在写入操作期间，在控制栅极上使用相同的偏置电压。 因此，每单位芯片面积的存储器被增强并且外围电路被简化。

    Four-terminal EEPROM cell for storing an analog voltage and memory system using the same to store multiple bits per EEPROM cell
    2.
    发明授权
    Four-terminal EEPROM cell for storing an analog voltage and memory system using the same to store multiple bits per EEPROM cell 有权

    公开(公告)号：US6154392A

    公开(公告)日：2000-11-28

    申请号：US417040

    申请日：1999-10-12

    申请人： Robert Patti

    发明人： Robert Patti

    IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/28 ,  G11C27/00

    CPC分类号： G11C11/5642 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/0416 ,  G11C16/10 ,  G11C16/28 ,  G11C27/005 ,  G11C2211/5613 ,  G11C2211/5634

    摘要： A non-volatile memory based on a unique EEPROM memory. The non-volatile memory includes a plurality of data memory cells, a data programming circuit, and a first data line. Each data memory cell includes an EEPROM cell having a separate programming electrode and first and second isolation transistors. The programming electrode is coupled to the floating gate by a tunneling window. The first isolation transistor connects the EEPROM cell to the first data line. The second isolation transistor connects the programming electrode to the data programming circuit in response to a write enable signal. The data programming circuit programs a selected data memory cell by receiving a data value to be stored in that data memory cell and generating and coupling a programming signal to the second isolation transistors, the programming signal having a duration that is determined by the received data value. The memory also includes a plurality of first reference memory cells, a first reference programming circuit, and a first reference line, each first reference memory cell is structurally the same as the data memory cells. There is one first reference memory cell corresponding to each data memory cell, and that first reference cell is programmed with a predetermined value each time the corresponding data memory cell is programmed. A data memory cell is read by comparing the conductance of the first data line to the first reference line. The data reading circuit generates an output value that depends on the compared conductances. In embodiments of the invention using multiple reference cells, the various reference cells are programmed with different fixed values each time the corresponding data memory cell is programmed. The values in these reference cells are interpolated during the reading operation to determine the data value stored in the corresponding data memory cell.

    Techniques of programming and erasing an array of multi-state flash EEPROM cells including comparing the states of the cells to desired values
    3.
    发明授权
    Techniques of programming and erasing an array of multi-state flash EEPROM cells including comparing the states of the cells to desired values 失效
    编程和擦除多状态快闪EEPROM单元阵列的技术，包括将单元格状态与期望值进行比较

    公开(公告)号：US5909390A

    公开(公告)日：1999-06-01

    申请号：US991650

    申请日：1997-12-16

    申请人： Eliyahou Harari

    发明人： Eliyahou Harari

    IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/34 ,  G11C29/00 ,  H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  G11C7/00

    CPC分类号： H01L27/11519 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5642 ,  G11C16/0425 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/765 ,  G11C29/82 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11517 ,  H01L29/7881 ,  H01L29/7885 ,  G11C2211/5613 ,  G11C2211/5631 ,  G11C2211/5634 ,  G11C2211/5644 ,  G11C29/00

    摘要： A memory system made up of electrically programmable read only memory (EPROM) or flash electrically erasable and programmable read only memory (EEPROM) cells. An intelligent programming technique allows each memory cell to store more than the usual one bit of information. More than one bit is stored in a cell by establishing more than two distinct threshold states into which the cell is programmed. A series of pulses of increasing voltage is applied to each addressed memory cell during its programming, the state of the cell being read in between pulses. The pulses are terminated upon the addressed cell reaching its desired state or a preset maximum number of pulses has been reached. An intelligent erase algorithm prolongs the useful life of the memory cells. A series of pulses is also applied to a block of cells being erased, the state of at least a sample number of cells being read in between pulses. The erasing process is stopped when the cells being read are determined to have reached a fully erased state or one of a number of other conditions has occurred. Individual records of the number of erase cycles experienced by blocks of flash EEPROM cells are kept, preferable as part of the blocks themselves, in order to maintain an endurance history of the cells within the blocks. Use of these various features provides a memory having a very high storage density and a long life, making it particularly useful as a solid state memory in place of magnetic disk storage devices in computer systems.

    摘要翻译： 由电可编程只读存储器（EPROM）或闪存电可擦除和可编程只读存储器（EEPROM）单元组成的存储器系统。 智能编程技术允许每个存储器单元存储比通常的一位信息。 通过建立单元被编程的两个以上不同的阈值状态，多个位被存储在单元中。 在其编程期间，一系列增加电压的脉冲被施加到每个寻址的存储器单元，在脉冲之间读取单元的状态。 脉冲在所寻址的单元达到其期望状态时终止，或达到预设的最大脉冲数。 智能擦除算法可延长存储单元的使用寿命。 一系列脉冲也被施加到被擦除的单元块，在脉冲之间读取至少一个单元的样本数的状态。 当读取的单元被确定为已经达到完全擦除状态或者已经发生了许多其他条件中的一种时，停止擦除过程。 保存快闪EEPROM单元块所经历的擦除周期数的个别记录，优选作为块本身的一部分，以便保持块内的单元的耐久性历史。 使用这些各种特征提供了具有非常高的存储密度和长寿命的存储器，使得其作为固态存储器代替计算机系统中的磁盘存储装置是特别有用的。

    Flash EEPROM system which maintains individual memory block cycle counts
    5.
    发明授权
    Flash EEPROM system which maintains individual memory block cycle counts 失效
    闪存EEPROM系统，其维持单独的存储器块周期计数

    公开(公告)号：US5568439A

    公开(公告)日：1996-10-22

    申请号：US468061

    申请日：1995-06-06

    申请人： Eliyahou Harari

    发明人： Eliyahou Harari

    IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/34 ,  G11C29/00 ,  H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  G11C16/06 ,  G06F11/20

    CPC分类号： H01L27/11519 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5642 ,  G11C16/0425 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/765 ,  G11C29/82 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11517 ,  H01L29/7881 ,  H01L29/7885 ,  G11C2211/5613 ,  G11C2211/5631 ,  G11C2211/5634 ,  G11C2211/5644 ,  G11C29/00

    摘要： A memory system made up of electrically programmable read only memory (EPROM) or flash electrically erasable and programmable read only memory (EEPROM) cells. An intelligent programming technique allows each memory cell to store more than the usual one bit of information. More than one bit is stored in a cell by establishing more than two distinct threshold states into which the cell is programmed. A series of pulses of increasing voltage is applied to each addressed memory cell during its programming, the state of the cell being read in between pulses. The pulses are terminated upon the addressed cell reaching its desired state or a preset maximum number of pulses has been reached. An intelligent erase algorithm prolongs the useful life of the memory cells. A series of pulses is also applied to a block of cells being erased, the state of at least a sample number of cells being read in between pulses. The erasing process is stopped when the cells being read are determined to have reached a fully erased state or one of a number of other conditions has occurred. Individual records of the number of erase cycles experienced by blocks of flash EEPROM cells are kept, preferable as part of the blocks themselves, in order to maintain an endurance history of the cells within the blocks. Use of these various features provides a memory having a very high storage density and a long life, making it particularly useful as a solid state memory in place of magnetic disk storage devices in computer systems.

    摘要翻译： 由电可编程只读存储器（EPROM）或闪存电可擦除和可编程只读存储器（EEPROM）单元组成的存储器系统。 智能编程技术允许每个存储器单元存储比通常的一位信息。 通过建立单元被编程的两个以上不同的阈值状态，多个位被存储在单元中。 在其编程期间，一系列增加电压的脉冲被施加到每个寻址的存储器单元，在脉冲之间读取单元的状态。 脉冲在所寻址的单元达到其期望状态时终止，或达到预设的最大脉冲数。 智能擦除算法可延长存储单元的使用寿命。 一系列脉冲也被施加到被擦除的单元块，在脉冲之间读取至少一个单元的样本数的状态。 当读取的单元被确定为已经达到完全擦除状态或者已经发生了许多其他条件中的一种时，停止擦除过程。 保存快闪EEPROM单元块所经历的擦除周期数的个别记录，优选作为块本身的一部分，以便保持块内的单元的耐久性历史。 使用这些各种特征提供了具有非常高的存储密度和长寿命的存储器，使得其作为固态存储器代替计算机系统中的磁盘存储装置是特别有用的。

    Multi-state flash EEPROM system using incremental programing and erasing methods
    6.
    发明授权
    Multi-state flash EEPROM system using incremental programing and erasing methods 失效
    多状态闪存EEPROM系统采用增量编程和擦除方式

    公开(公告)号：US5293560A

    公开(公告)日：1994-03-08

    申请号：US970949

    申请日：1992-11-03

    申请人： Eliyahou Harari

    发明人： Eliyahou Harari

    IPC分类号： G11C11/56 ,  G11C16/04 ,  G11C16/34 ,  G11C29/00 ,  H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788

    CPC分类号： H01L27/11519 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5642 ,  G11C16/0425 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/765 ,  G11C29/82 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11517 ,  H01L29/7881 ,  H01L29/7885 ,  G11C2211/5613 ,  G11C2211/5631 ,  G11C2211/5634 ,  G11C2211/5644 ,  G11C29/00

    摘要： A memory system made up of electrically programmable read only memory (EPROM) or flash electrically erasable and programmable read only memory (EEPROM) cells. An intelligent programming technique allows each memory cell to store more than the usual one bit of information. More than one bit is stored in a cell by establishing more than two distinct threshold states into which the cell is programmed. A series of pulses of increasing voltage is applied to each addressed memory cell during its programming, the state of the cell being read in between pulses. The pulses are terminated upon the addressed cell reaching its desired state or a preset maximum number of pulses has been reached. An intelligent erase algorithm prolongs the useful life of the memory cells. A series of pulses is also applied to a block of cells being erased, the state of at least a sample number of cells being read in between pulses. The erasing process is stopped when the cells being read are determined to have reached a fully erased state or one of a number of other conditions has occurred. Use of these various features provides a memory having a very high storage density and a long life, making it particularly useful as a solid state memory in place of magnetic disk storage devices in computer systems.

    摘要翻译： 由电可编程只读存储器（EPROM）或闪存电可擦除和可编程只读存储器（EEPROM）单元组成的存储器系统。 智能编程技术允许每个存储器单元存储比通常的一位信息。 通过建立单元被编程的两个以上不同的阈值状态，多个位被存储在单元中。 在其编程期间，一系列增加电压的脉冲被施加到每个寻址的存储器单元，在脉冲之间读取单元的状态。 脉冲在所寻址的单元达到其期望状态时终止，或达到预设的最大脉冲数。 智能擦除算法可延长存储单元的使用寿命。 一系列脉冲也被施加到被擦除的单元块，在脉冲之间读取至少一个单元的样本数的状态。 当读取的单元被确定为已经达到完全擦除状态或者已经发生了许多其他条件中的一种时，停止擦除过程。 使用这些各种特征提供了具有非常高的存储密度和长寿命的存储器，使得其作为固态存储器代替计算机系统中的磁盘存储装置是特别有用的。