摘要:
A high-gain solid-state amplifier (20) includes an amplification stage including a transistor (Q.sub.1) having a current-dependent transconductance value. The transistor is operatively connected to a load resistor (R.sub.L1) through which a load current (I.sub.1) flows. The value of the load resistor together with the transconductance value affects the voltage gain of the amplifier. A resistor (R.sub.2) provides a supplemental bias current (I.sub.2) to a current summing node (A). The current summing node sums the load current and the supplemental bias current and provides the transistor with a total current (I.sub.d) that affects the transconductance value. The value of the supplemental bias current is chosen to supplement the load current to provide a predetermined total current so that the voltage gain may be adjusted by adjusting the load resistor without changing the transconductance value. Alternatively, the amplifier voltage gain may be enhanced by increasing the supplemental bias current and transistor size in a known manner while maintaining a fixed value of the load resistor.
摘要:
An integrated circuit with temperature compensation being provided for field effect transistors by a matched FET which provides an Idss which varies with temperature and which determines the drain current of the temperature compensated field effect transistors.
摘要:
A circuit that includes a Darlington transistor pair having an input transistor and an output transistor configured to generate an output signal at an output node in response to an input signal received through an input node is disclosed. The circuit has a feedback coupling network coupled between the output node and the input node for feeding back to the input node a portion of an amplified version of the input signal that passes through the input transistor. The circuit further includes a bias feedback network that includes a bias transistor and a resistive network that consists of only resistive elements such that no inductors and no capacitors are provided within the bias feedback network.
摘要:
The semiconductor amplifier circuit provided with frequency characteristics excellent in both band width and flatness is disclosed. The amplifier circuit comprises: an input section (10) including: a first inversion amplifier circuit (11) for inversion-amplifying an input signal; and a feedback circuit (15) of a field effect transistor having a grounded gate, a source for receiving a feedback signal, and a drain connected to an output terminal of the first inversion amplifier circuit; a first level shift circuit (20) for shifting level of an output of the input section; a second inversion amplifier circuit (30) for inversion-amplifying an output of the first level shift circuit; and a second level shift circuit (40) for shifting level of an output of the second inversion amplifier circuit. Here, the amplifier circuit is characterized in that the output of the second level shift circuit (40) is applied to the feedback circuit (15) as the feedback signal.
摘要:
A balanced cascode current mirror includes first and second current paths respectively defined by first and second transistors and by third and fourth transistors. Each current path may include the sources and drains of the transistors in such path. Connections may respectively extend between the gates of the first and third transistors and between the gates of the second and fourth transistors to provide the first and third transistors with substantially identical source, gate, and drain impedances. An input current is introduced to the drain of the second transistor and an output current with substantially identical characteristics is obtained from the drain of the fourth transistor. A capacitance may be connected between the drain of the second transistor and the gate of the first transistor to produce a flow of current at high frequencies through the first current path corresponding to the input current at the drain of the second transistor. A fifth transistor may be connected in a circuit with a constant current source to regulate the current through the first and second transistors to be substantially equal to the input current at low frequencies. The gate of the fifth transistor may be connected to the drain of the second transistor, and the source of the fifth transistor may be connected to the gate of the first transistor, to provide this current regulation. The gates of the second and fourth transistors and the drain of the fifth transistor may have a common reference potential such as ground.
摘要:
Improved forward transimpedance amplifiers are provided using a field effect transistor first amplification stage, direct coupled to a bipolar junction transistor second amplification stage. In some embodiments an optional third bipolar junction transistor amplification stage is provided, direct coupled from the second stage. Negative feedback signals are connected from the output of the bipolar junction transistor stage to the input of the field effect transistor stage. The invention provides simple and low-cost amplifiers with very high forward transimpedance and other performance characteristics approaching those of an ideal amplifier, permitting the realization of a nearly ideal transimpedance amplifier with performance characteristics dominated by its feedback network.
摘要:
An FET amplifier having a current bleeder includes a positive feedback path for increasing the overall gain of the device. The positive feedback path includes an additional FET having its drain source path connected to the current bleeder and its gate connected to the output of the amplifier. The positive feedback causes the current through the current bleeder to vary in direct response to the output of the amplifier, thereby significantly increasing its overall gain.
摘要:
An output voltage of a negative voltage generator contains a ripple because of a ripple occurring in a voltage produced by a charge pump circuit in the negative voltage generator. When the negative voltage is supplied to an FET amplifier, there arises a possibility that an unwanted spurious component occurs in an output of the FET amplifier. Since each of pair of circuits, that generate a negative voltage, are made mutually complementary, two charge pump circuits are used to cancel ripples. A ripple appearing in an output voltage can therefore be suppressed, and a negative voltage can eventually be supplied more stably. When the negative voltage generator is connected to, for example, an FET amplifier in order to supply a gate bias voltage to each FET in the FET amplifier, an unwanted spurious component that may be contained in an output of the FET amplifier can be removed.