Abstract:
A motor having a rotor, the rotor including a first metal plate having a first size and a second metal plate having a second size arranged on a first surface associated with the rotor. The first metal plate and the second metal plate are arranged adjacent to each other at a predetermined distance from an axis of rotation of the rotor. The first surface rotates perpendicularly about the axis in response to the rotor being rotated about the axis. A stator includes a third metal plate arranged on a second surface associated with the stator. The third metal plate is arranged on the second surface at the predetermined distance from the axis. The second surface is parallel to the first surface and faces the first surface.
Abstract:
A metal oxide metal (MOM) capacitor includes an outer conducting structure defined in a plurality of metal layers and a plurality of via layers of an integrated circuit including first opposing side walls, second opposing side walls, a cavity with first and second openings, and openings in the first opposing side walls. An inner conducting structure is defined in the plurality of metal layers and the plurality of via layers of the integrated circuit. The inner conducting structure is arranged in the cavity of the outer conducting structure and includes a body, and conducting extensions that extend from the body through the openings in the first opposing side walls. Oxide is arranged between the outer conducting structure and the inner conducting structure.
Abstract:
Figure 3 is an exemplary embodiment of a free running oscillator (310) that is calibrated, the calibration circuit includes the reference oscillator (320), calibration control circuit (330), programmable look-up table (340), transistor (350), capacitor (360), and PWM circuit (370). The invention adjusts a capacitance value by pulse width modulating a control voltage for a switch in series with a capacitor. The PWM signal can be adjusted by using entry values found in a look up table, by using analog or digital control signals, or other approppate methods. The capacitance value tunes a frequency response or characteristic of an electronic circuit The response can be made to be insensitive to conditions such as temperature, power supply voltage or processing.
Abstract:
A system including a clock generator configured to generate a clock; a plurality of analog-to-digital converters each configured to convert a signal based on the clock, and to output a first number of bits in response to converting the signal based on the clock; and an averaging module configured to receive the first number of bits from each of the plurality of analog-to-digital converters, and to output a second number of bits. The second number of bits is greater than the first number of bits.
Abstract:
An integrated circuit including a well region (156) having a first doping level and a plurality of semiconductor regions (154) implanted in the well region. Each of the plurality of semiconductor regions has a second doping level greater than the first doping level. A plurality of polysilicon regions (202-1, 202-2, 204-1, 204-2; 302-1, 302-2, 304-1, 304-2) arranged on the plurality of semiconductor regions forms a plurality of ballast resistors. The polysilicon regions are respectively connected to the semiconductor regions, which are degenerated below said polysilicon regions so as to create an additional resistivity. The plurality of semiconductor regions constitutes a drain region of a metal-oxide semiconductor field-effect transistor (MOSFET).
Abstract:
Embodiments of the present disclosure provide a chip that comprises a base metal layer (102) formed over a first semiconductor die (104) and a first metal layer (110) formed over the base metal layer. The first metal layer includes a plurality of islands (112) configured to route at least one of (i) a ground signal or (ii) a power signal in the chip. The chip further comprises a second metal layer (118) formed over the first metal layer. The second metal layer includes a plurality of islands (120) configured to route at least one of (i) the ground signal or (ii) the power signal in the chip.
Abstract:
A system includes a first asymmetric core, a second asymmetric core, and a core switching module. The first asymmetric core executes an application when the system operates in a first mode and is inactive when the system operates in a second mode. The second asymmetric core executes the application when the system operates in the second mode. The core switching module switches operation of the system between the first mode and the second mode. The core switching module selectively stops processing of the application by the first asymmetric core after receiving a first control signal. The core switching module transfers a first state of the first asymmetric core to the second asymmetric core. The second asymmetric core resumes executing the application in the second mode.
Abstract:
A master generator that updates time data of remote devices comprises an acquisition module, a clock module, an encoding module, and a transmission module. The acquisition module acquires time data representing current time of day. The clock module receives and stores the time data from the acquisition module and periodically updates the time data. The encoding module encodes the time data from the clock module into time messages. The transmission module selectively superimposes the time messages onto a power signal.
Abstract:
An integrated circuit comprises a microelectromechanical (MEMS) resonator circuit that generates a reference frequency. A temperature sensor senses a temperature of the integrated circuit. Memory stores calibration parameters and selects at least one of the calibration parameters as a function of the sensed temperature. A phase locked loop module receives the reference signal, comprises a feedback loop having a feedback loop parameter and selectively adjusts the feedback loop parameter based on the at least one of the calibration parameters.
Abstract:
A crystal oscillator emulator integrated circuit comprises a first temperature sensor that senses a first temperature of the integrated circuit. Memory stores calibration parameters and selects at least one of the calibration parameters based on the first temperature. A semiconductor oscillator generates an output signal having a frequency, which is based on the calibration parameters, and an amplitude. An amplitude adjustment module compares the amplitude to a predetermined amplitude and generates a control signal that adjusts the amplitude based on the comparison.