公开(公告)号：WO2003036306A2

公开(公告)日：2003-05-01

申请号：PCT/US2002/032357

申请日：2002-10-09

Applicant: ELECTROGLAS, INC. ,  BOYLE, Timothy, J. ,  RICHTER, Wayne, E. ,  JOHNSON, Ladd, T. ,  TOM, Lawrence, A.

Inventor： BOYLE, Timothy, J. ,  RICHTER, Wayne, E. ,  JOHNSON, Ladd, T. ,  TOM, Lawrence, A.

IPC: G01R

CPC classification number: G01R31/2868 ,  G01R31/2851 ,  G01R31/2887 ,  G01R31/2893 ,  G01R31/311

Abstract: The invention provides a method of testing a circuit on a substrate. Generally speaking, a substrate is located in a transfer chuck, a surface of a test chuck is moved into contact with a substrate, the substrate is secured to the test chuck, the test chuck is moved relative to the transfer chuck so that the substrate moves off the transfer chuck, terminals on the substrate are moved into contact with contacts to electrically connect the circuit through the terminals and the contacts to an electric tester, signals are relayed through the terminal and the contacts between the electric tester and the circuit, the terminals are disengaged from the contacts, and the substrate is removed from the test chuck.

Abstract translation: 本发明提供一种测试衬底上电路的方法。 一般来说，基板位于转移卡盘中，测试卡盘的表面移动与基板接触，将基板固定到测试卡盘，使测试卡盘相对于转印卡盘移动，使得基板移动 关闭转印卡盘，基板上的端子移动与触点接触，将电路通过端子和触点电连接到电气测试仪，信号通过端子和电测试器与电路之间的触点中继，端子 从触点脱离，并且将基板从测试卡盘移除。

公开(公告)号：WO0235249A3

公开(公告)日：2002-07-18

申请号：PCT/US0132626

申请日：2001-10-24

Applicant: MITSUBISHI ELECTRONICS AMERICA ,  ORBAN RICHARD

Inventor： ORBAN RICHARD

IPC: G01R31/311

CPC classification number: G01R31/311

Abstract: A circuit is tested for latch-up by scanning an optical beam across the surface, supplying power to the integrated circuit, monitoring the power of the power supply, and detecting latch-up in the integrated circuit by capturing an image of the integrated circuit when the power reaches a predetermined threshold. The captured image is compared with a baseline image to determine where latch-up occurs in the circuit.

Abstract translation: 通过在表面上扫描光束来测试电路的闩锁，向集成电路供电，监控电源的功率，以及通过捕获集成电路的图像来检测集成电路的闩锁，当捕获集成电路的图像时 功率达到预定阈值。 拍摄的图像与基线图像进行比较，以确定电路中闩锁发生的位置。

公开(公告)号：WO0229357A2

公开(公告)日：2002-04-11

申请号：PCT/US0141293

申请日：2001-07-06

Applicant: ELECTRO SCIENT IND INC

Inventor： LEONARD PATRICK F ,  SCARPINE VICTOR ,  EVANS FRANK

IPC: G01B11/25 ,  G01R31/311 ,  G06T7/00 ,  G01B11/00

CPC classification number: G06T7/0004 ,  G01B11/25 ,  G01R31/311 ,  G06T2207/30148 ,  G06T2207/30152

Abstract: The present invention provides for methods and apparatus for evaluating objects having three dimensional features. One method involve using both two dimensional data sets to improve the processing of three dimensional data sets. The two dimensional data set can be used to pre-qualify the three dimensional data set, or may be used to locate that data within the three dimensional data set which is characteristic of the three dimensional feature. The invention may include a sensor which is configured to capture both three dimensional and two dimensional data. The present invention provides for an efficient technique to evaluate three dimensional data. The present invention also solves heretofore unrecognized problems associated with geometric distortion.

Abstract translation: 本发明提供了用于评估具有三维特征的物体的方法和装置。 一种方法涉及使用二维数据集来改进三维数据集的处理。 二维数据集可以用于预先限定三维数据集，或者可以用于在三维特征的特征的三维数据集内定位该数据。 本发明可以包括被配置为捕获三维和二维数据的传感器。 本发明提供了一种评估三维数据的有效技术。 本发明还解决了与几何失真相关的未被认识的问题。

公开(公告)号：WO01067071A2

公开(公告)日：2001-09-13

申请号：PCT/US2001/007475

申请日：2001-03-07

IPC: G01N21/956 ,  G01R31/311 ,  H01L21/66 ,  G01N21/00

CPC classification number: G01R31/311 ,  G01N21/95607 ,  G01N21/95684 ,  H01L22/12

Abstract: A structure (10) having a number of traces (11A-11N) passing through a region (11) is evaluated by using a beam (12) of electromagnetic radiation to illuminate the region, and generating an electrical signal that indicates an attribute of a portion (also called "reflected portion") of the beam reflected from the region. The just-described acts of "illuminating" and "generating" are repeated in another region, followed by a comparison of the generated signals to identify variation of a property between the two regions. Such measurements can identify variations in material properties (or dimensions) between different regions in a single semiconductor wafer of the type used in fabrication of integrated circuit dice, or even between multiple such wafers. In one embodiment, the traces are each substantially parallel to and adjacent to the other, and the beam has wavelength greater than or equal to a pitch between at least two of the traces. In one implementation the beam is polarized, and can be used in several ways, including, e.g., orienting the beam so that the beam is polarized in a direction parallel to, perpendicular to, or at 45 DEG to the traces. Energy polarized parallel to the traces is reflected by the traces, whereas energy polarized perpendicular to the traces passes between the traces and is reflected from underneath the traces. Measurements of the reflected light provide an indication of changes in properties of a wafer during a fabrication process.

Abstract translation: 通过使用电磁辐射束（12）照射该区域来评估具有穿过区域（11）的多个迹线（11A-11N）的结构（10），并产生指示一个 从该区域反射的光束的部分（也称为“反射部分”）。 在另一区域重复刚才描述的“照明”和“产生”的动作，随后比较生成的信号以识别两个区域之间的属性的变化。 这样的测量可以识别在用于制造集成电路晶片的类型的单个半导体晶片中的不同区域之间的材料特性（或尺寸），或者甚至在多个这样的晶片之间的变化。 在一个实施例中，迹线各自基本上平行于并且彼此相邻，并且光束具有大于或等于至少两个迹线之间的间距的波长。 在一个实施方案中，光束是极化的，并且可以以多种方式使用，包括例如使光束定向，使得光束在平行于，垂直于或垂直于45°的方向上被极化。 平行于迹线的能量被迹线反射，而垂直于迹线偏振的能量在迹线之间通过，并从迹线下方反射。 反射光的测量提供了在制造过程中晶片的性质变化的指示。

公开(公告)号：WO01054186A1

公开(公告)日：2001-07-26

申请号：PCT/JP2001/000018

申请日：2001-01-05

IPC: G01R1/06 ,  G01R31/302 ,  G01R31/311 ,  H01L21/66

CPC classification number: G01R31/311

Abstract: A failure analysis method and system thereof, capable of performing a failure analysis on a semiconductor device, in which LSI chips such as system LSIs are arranged, in conjunction with circuit blocks within an LSI chip and based on a luminous image detected by an emission microscope. The method is characterized by comprising: an emission calculating step wherein an arranging condition of luminous points on an LSI chips-arranged semiconductor device is checked based on a luminous image detected by an emission microscope, luminous points are classified into a plurality of luminous types based on the checked arranging condition of luminous points, and the occurrence frequencies of respective classified luminous types are calculated for each LSI chip and for each of circuit blocks of different types in each LSI chip; and an analysis step for performing failure analysis based on the occurrence frequencies for each LSI chip and for each circuit block as calculated in the emission calculating step.

Abstract translation: 一种故障分析方法及其系统，能够对LSI LSI等LSI芯片配置的半导体装置与LSI芯片内的电路块进行失效分析，并根据发光显微镜检测出的发光图像 。 该方法的特征在于包括：发光计算步骤，其中基于由发射显微镜检测的发光图像来检查在LSI芯片布置的半导体器件上的发光点的布置条件，发光点被分类为多个发光类型 对于每个LSI芯片，对于每个LSI芯片和每个不同类型的电路块，计算发光点的检查布置条件，并且计算各个分类发光类型的出现频率; 以及分析步骤，用于根据在排放计算步骤中计算的每个LSI芯片和每个电路块的出现频率执行故障分析。

公开(公告)号：WO99064880A1

公开(公告)日：1999-12-16

申请号：PCT/US1999/013084

申请日：1999-06-09

IPC: G01N21/00 ,  G01N21/17 ,  G01R31/26 ,  G01R31/265 ,  G01R31/311 ,  H01L21/265 ,  H01L21/66 ,  G01N21/41

CPC classification number: G01N21/1717 ,  G01R31/2648 ,  G01R31/2656 ,  G01R31/311 ,  H01L22/12

Abstract: An apparatus and method uses diffusive modulation (without generating a wave of carriers) for measuring a material property (such as any one or more of: mobility, doping, and lifetime) that is used in evaluating a semiconductor wafer. The measurements are carried out in a small area, for use on wafers (106) having patterns for integrated circuit dice. The measurements are based on measurement of reflectance, for example as a function of carrier concentration. In one implementation, the semiconductor wafer (106) is illuminated with two beams (151, 152), one with photon energy above the bandgap energy of the semiconductor, and another with photon energy near or below the bandgap. The diameters of the two beams relative to one another are varied to extract additional information about the semiconductor material, for use in measuring, e.g. lifetime.

Abstract translation: 一种装置和方法使用扩散调制（不产生载波）来测量用于评估半导体晶片的材料性质（例如，迁移率，掺杂和寿命中的任何一个或多个）。 测量在小面积中进行，用于具有用于集成电路芯片的图案的晶片（106）上。 测量是基于反射率的测量，例如作为载流子浓度的函数。 在一个实现中，用两个光束（151,152）照射半导体晶片（106），一个光子能量高于半导体的带隙能量，另一个光子能量接近或低于带隙。 改变两个光束相对于彼此的直径以提取关于半导体材料的附加信息，以用于测量例如半导体材料。 一生。

公开(公告)号：WO99040449A1

公开(公告)日：1999-08-12

申请号：PCT/JP1998/000478

申请日：1998-02-05

IPC: G01R31/311 ,  G01R31/28 ,  G01R15/24 ,  G01R19/00

CPC classification number: G01R31/31728 ,  G01R31/311 ,  G01R31/31905

Abstract: In an IC testing equipment constituted of a main frame which stores electronic circuit devices including a pattern generator, a waveform generator, and a logic comparator and a test head, an optically driven driver and an optical output type voltage sensor are installed at the test head side and, at the main frame side, test pattern signals outputted from the waveform generator are converted to optical signals by means of optical signal converters, and the optical signals are transmitted to the head by means of optical waveguides to drive the optically driven driver mounted on the test head and then the optical signals are converted to an electrical signal, which is supplied to an IC to be tested. A response signal outputted from the IC to be tested is given to the optical output type voltage sensor and then the optical output type voltage sensor transmits the voltage signal outputted from the IC to be tested as an optical signal, which is transmitted to the main frame. By this method, an IC testing equipment which is capable of rapid operation can be provided.

Abstract translation: 在存储包括图案发生器，波形发生器，逻辑比较器和测试头的电子电路装置的主框架的IC测试设备中，在测试头上安装有光驱动驱动器和光输出型电压传感器 并且在主框架侧，通过光信号转换器将从波形发生器输出的测试图案信号转换为光信号，并且光信号通过光波导传输到头部以驱动安装在光驱 在测试头上，然后将光信号转换成电信号，该电信号被提供给待测试的IC。 从被测试IC输出的响应信号被提供给光输出型电压传感器，然后光输出型电压传感器将从被测IC输出的电压信号作为光信号发送，该信号被发送到主帧 。 通过这种方法，可以提供能够快速操作的IC测试设备。

公开(公告)号：WO1997014047A1

公开(公告)日：1997-04-17

申请号：PCT/US1996015163

申请日：1996-09-23

Applicant: THE PENN STATE RESEARCH FOUNDATION

Inventor： THE PENN STATE RESEARCH FOUNDATION ,  FONASH, Stephen, J.

IPC: G01R31/28

CPC classification number: G01R31/311

Abstract: An electro-optic detector (63) senses induced photovoltages in a semiconductor structure (50) through use of an electro-optic sensing material (64). The sensing material (64) is closely positioned to the surface of a semiconductor structure (50) so as to be locally affected by electric field (62) changes which occur as a result of induced photovoltages. An interrogating optical beam (60) is directed at the semiconductor structure (50) so as to induce locally positioned photovoltages at a surface thereof. An optical sensing beam (70) is directed at the electro-optic sensing material (64) and a detector (63) senses reflections of the optical sensing beam (70) from the electro-optic layer both in regions affected by the local photovoltage field changes and in regions not affected by the local photovoltage field changes. Characteristics of the semiconductor structure (50) are deduced from reflection data derived from the optical sensing beam (70).

Abstract translation: 电光检测器（63）通过使用电光感测材料（64）感测半导体结构（50）中的感应光电压。 感测材料（64）紧密地定位于半导体结构（50）的表面，以便局部地受到由感应光电压引起的电场（62）变化的影响。 询问光束（60）指向半导体结构（50），以便在其表面处引起局部定位的光伏电压。 光学感测光束（70）指向电光感测材料（64），并且检测器（63）在受局部光电场影响的区域中感测来自电光层的光学感测光束（70）的反射 变化和不受局部光电场变化影响的区域。 来自光学感测光束（70）的反射数据推导出半导体结构（50）的特征。

公开(公告)号：WO1995030307A1

公开(公告)日：1995-11-09

申请号：PCT/US1995005320

申请日：1995-05-01

Applicant: COGNEX CORPORATION ,  PETRY, John, P. ,  MICHAEL, David, J. ,  GARAKANI, Arman

Inventor： COGNEX CORPORATION

IPC: H04N07/18

CPC classification number: H01L21/67288 ,  G01R31/2853 ,  G01R31/311 ,  H01L21/67271 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/78 ,  H01L2224/78301 ,  H01L2224/85 ,  H01L2224/859 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/14 ,  H04N7/18 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00

Abstract: This invention provides a method and apparatus for automatically inspecting the connection of a wire (50) to a lead (30) on a lead frame (10) containing a semiconductor chip (20) or similar device. Using an image processor (06) to locate the general position of a soldered lead (30) in a digitized image, the present invention creates, in Step (A), a template (120) of an idealized optical indentation left by a good bond; determines parameters such as wire angle, idealized position and shape thresholds for applying the template (120); conducts a normalized correlation search of a digitized image in Step (C); compares the results returned to the parameters and reports, in Step (D) the resulting signals generated by this comparison to a host controller (08) or other control module.

Abstract translation: 本发明提供了一种用于自动检查包含半导体芯片（20）或类似装置的引线框架（10）上的导线（30）与引线（30）的连接的方法和装置。 使用图像处理器（06）来定位焊接引线（30）在数字化图像中的一般位置，本发明在步骤（A）中创建由良好的键合留下的理想光学压痕的模板（120） ; 确定用于应用模板（120）的诸如线角度，理想位置和形状阈值的参数; 在步骤（C）中进行数字化图像的归一化相关搜索; 将返回到参数和报告的结果与步骤（D）中的结果信号进行比较，该结果由该比较生成的信号与主机控制器（08）或其他控制模块进行比较。

公开(公告)号：WO2018000495A1

公开(公告)日：2018-01-04

申请号：PCT/CN2016/092256

申请日：2016-07-29

Applicant: 中国科学院深圳先进技术研究院

Inventor： 李慧云 ,  邵翠萍 ,  刘玢玢

IPC: G01R31/311

CPC classification number: G01R31/311

Abstract: 一种芯片单粒子效应探测方法及装置，其中方法包括：将待测芯片放入测试机台，触发待测芯片产生单粒子效应；随机关断待测芯片的扫描寄存器，形成随机观测矩阵；向待测芯片提供输入测试向量，获得待测芯片的输出测试向量，根据输出测试向量获得错误总数向量；对错误总数向量进行压缩感知信号重构，确定待测芯片内部敏感区域。可以高效、便捷地对芯片单粒子效应进行探测。