公开(公告)号：WO2023038786A1

公开(公告)日：2023-03-16

申请号：PCT/US2022/041126

申请日：2022-08-22

Applicant: INTEL CORPORATION

Inventor： PIETAMBARAM, Srinivas V. ,  MARIN, Brandon C. ,  MALLIK, Debendra ,  IBRAHIM, Tarik A. ,  ECTON, Jeremy ,  KARHADE, Omkar G. ,  PENMECHA, Bharat Prasad ,  LI, Xiaoqian ,  DESHPANDE, Nitin A. ,  MODI, Mitul ,  NIE, Bai

IPC: H01L25/16 ,  G02B6/12 ,  H01L23/13 ,  H01L23/15 ,  H01L23/538 ,  H01L21/52

Abstract: An optoelectronic assembly is disclosed, comprising a substrate having a core comprised of glass, and a photonic integrated circuit (PIC) and an electronic IC (EIC) coupled to a first side of the substrate. The core comprises a waveguide with a first endpoint proximate to the first side and a second endpoint exposed on a second side of the substrate orthogonal to the first side. The first endpoint of the waveguide is on a third side of the core parallel to the first side of the substrate. The substrate further comprises an optical via aligned with the first endpoint, and the optical via extends between the first side and the third side. In various embodiments, the waveguide is of any shape that can be inscribed by a laser between the first endpoint and the second endpoint.

公开(公告)号：WO2022139925A1

公开(公告)日：2022-06-30

申请号：PCT/US2021/051902

申请日：2021-09-24

Applicant: INTEL CORPORATION

Inventor： KARHADE, Omkar G. ,  SUN, Xiaoxuan ,  DESHPANDE, Nitin A. ,  AGRAHARAM, Sairam

IPC: H01L23/538 ,  H01L23/00

Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.

公开(公告)号：WO2018063634A1

公开(公告)日：2018-04-05

申请号：PCT/US2017/048846

申请日：2017-08-28

Applicant: INTEL CORPORATION

Inventor： CETEGEN, Edvin ,  KARHADE, Omkar G. ,  DHANE, Kedar ,  JHA, Chandra M.

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/00 ,  H01L25/065 ,  H01L23/40

Abstract: A thermal interface may include a wired network made of a first TIM, and a second TIM surrounding the wired network. A heat spreader lid may include a wired network attached to an inner surface of the heat spreader lid. An IC package may include a heat spreader lid placed over a first electronic component and a second electronic component. A first thermal interface may be formed between the first electronic component and the inner surface of the heat spreader lid, and a second thermal interface may be formed between the second electronic component and the inner surface of the heat spreader lid. The first thermal interface may include a wired network of a first TIM surrounded by a second TIM, while the second thermal interface may include the second TIM, without a wired network of the first TIM. Other embodiments may be described and/or claimed.

Abstract translation: 热接口可以包括由第一TIM构成的有线网络和围绕有线网络的第二TIM。 散热器盖可以包括附接到散热器盖的内表面的有线网络。 IC封装可以包括放置在第一电子部件和第二电子部件上的散热器盖。 第一热界面可以形成在第一电子部件和散热器盖的内表面之间，并且第二热界面可以形成在第二电子部件和散热器盖的内表面之间。 第一热接口可以包括由第二TIM围绕的第一TIM的有线网络，而第二热接口可以包括第二TIM，而不具有第一TIM的有线网络。 其他实施例可以被描述和/或要求保护。

公开(公告)号：WO2018118278A1

公开(公告)日：2018-06-28

申请号：PCT/US2017/061652

申请日：2017-11-15

Applicant: INTEL CORPORATION

Inventor： KARHADE, Omkar G.

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/498 ,  H01L23/00

Abstract: An embodiment includes an apparatus comprising: a substrate; a first die including a processor core; a second die not including a processor core; and a third die including memory cells; wherein: (a)(i) the first die has a smaller minimum pitch than the second die; (a)(ii) a first vertical axis intersects the substrate and the first and second dies but not the third die; and (a)(iii) a second vertical axis intersects the substrate and the second and third dies but not the first die. Other embodiments are described herein.

公开(公告)号：WO2015130264A1

公开(公告)日：2015-09-03

申请号：PCT/US2014/018482

申请日：2014-02-26

Applicant: INTEL CORPORATION ,  DESHPANDE, Nitin A. ,  KARHADE, Omkar G.

Inventor： DESHPANDE, Nitin A. ,  KARHADE, Omkar G.

IPC: H01L23/48

CPC classification number: H01L23/5383 ,  H01L21/486 ,  H01L23/13 ,  H01L23/522 ,  H01L23/5381 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/14 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/1703 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/15153 ,  H01L2924/15192

Abstract: A microelectronic structure includes a substrate having a first surface and a cavity extending into the substrate from the substrate first surface, a first microelectronic device and a second microelectronic device attached to the substrate first surface, and a bridge disposed within the substrate cavity and attached to the first microelectronic device and to the second microelectronic device. The bridge includes a plurality conductive vias extending from a first surface to an opposing second surface of the bridge, wherein the conductive vias are electrically coupled to deliver electrical signals from the substrate to the first microelectronic device and the second microelectronic device. The bridge further creates at least one electrical signal connection between the first microelectronic device and the second microelectronic device.

Abstract translation: 微电子结构包括具有第一表面和从衬底第一表面延伸到衬底中的空腔的衬底，附接到衬底第一表面的第一微电子器件和第二微电子器件，以及设置在衬底腔内并附接到 第一微电子器件和第二微电子器件。 桥包括从桥的第一表面延伸到相对的第二表面的多个导电通孔，其中导电通孔电耦合以将电信号从基板传递到第一微电子器件和第二微电子器件。 该桥进一步在第一微电子器件和第二微电子器件之间产生至少一个电信号连接。

公开(公告)号：WO2018111249A1

公开(公告)日：2018-06-21

申请号：PCT/US2016/066433

申请日：2016-12-14

Applicant: INTEL CORPORATION

Inventor： KARHADE, Omkar G. ,  CETEGEN, Edvin ,  SANE, Sandeep B.

IPC: H01L23/04 ,  H01L23/10 ,  H01L23/00 ,  H01L25/065 ,  H01L23/498

Abstract: Disclosed herein are integrated circuit (IC) packages with plates, as well as related devices and methods. For example, in some embodiments, an IC package may include: a package substrate; a plurality of electrical components secured to a face of the package substrate; and a plate secured to the plurality of electrical components with an adhesive such that the plurality of electrical components are between the plate and the package substrate.

公开(公告)号：WO2018063228A1

公开(公告)日：2018-04-05

申请号：PCT/US2016/054381

申请日：2016-09-29

Applicant: INTEL CORPORATION

Inventor： KARHADE, Omkar G. ,  RARAVIKAR, Nachiket R. ,  SANE, Sandeep B.

IPC: H01L23/00 ,  H01L23/488 ,  H01L21/324 ,  H01L23/12

CPC classification number: H01L23/49816 ,  H01L23/12 ,  H01L23/488 ,  H01L23/562 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/3511

Abstract: Methods/structures of joining package structures are described. Those methods/structures may include a device disposed on first side of substrate and an array of conductive interconnect structures disposed on a second side of the first substrate. The conductive interconnect structures of the array may comprise a solder material, wherein the solder material comprises a low temperature alloying element concentration of less than about 5 percent. A second substrate is coupled to the array of conductive interconnect structures.

Abstract translation: 描述了连接封装结构的方法/结构。 那些方法/结构可以包括设置在衬底的第一侧上的器件和设置在第一衬底的第二侧上的导电互连结构的阵列。 阵列的导电互连结构可以包括焊料材料，其中焊料材料包括小于约5％的低温合金元素浓度。 第二衬底耦合到导电互连结构阵列。

公开(公告)号：WO2022225633A1

公开(公告)日：2022-10-27

申请号：PCT/US2022/021314

申请日：2022-03-22

Applicant: INTEL CORPORATION

Inventor： KARHADE, Omkar G. ,  LI, Xiaoqian ,  IBRAHIM, Tarek A. ,  MAHAJAN, Ravindranath Vithal ,  DESHPANDE, Nitin A.

IPC: G02B6/43 ,  G02B6/42

Abstract: Photonic packages and device assemblies that include photonic integrated circuits (PICs) coupled to optical lenses on lateral sides of the PICs. An example photonic package comprises a package support, an integrated circuit (IC), an insulating material, a PIC having an active side and a lateral side substantially perpendicular to the active side. At least one optical structure is on the active side. A substantial portion of the active side is in contact with the insulating material, and the PIC is electrically coupled to the package support and to the IC. The photonic package further includes an optical lens coupled to the PIC on the lateral side. In some embodiments, the photonic package further includes an interposer between the PIC or the IC and the package support.

公开(公告)号：WO2018125412A1

公开(公告)日：2018-07-05

申请号：PCT/US2017/061735

申请日：2017-11-15

Applicant: INTEL CORPORATION

Inventor： KARHADE, Omkar G. ,  DHANE, Kedar ,  MIN, Yongki ,  LAMBERT, William J.

IPC: H01L25/065 ,  H01L23/13 ,  H01L23/36

Abstract: Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include attaching a stiffener on a substrate, wherein a first section of the stiffener and a second section of the stiffener are on opposite sides of an opening. At least one component may be attached on the substrate within the opening, wherein the at least one component is disposed between the first section of the stiffener and the second section of the stiffener, and wherein the stiffener comprises a grounding structure disposed on the substrate.

公开(公告)号：WO2015130264A9

公开(公告)日：2015-09-03

申请号：PCT/US2014/018482

申请日：2014-02-26

Applicant: INTEL CORPORATION ,  DESHPANDE, Nitin A. ,  KARHADE, Omkar G.

Inventor： DESHPANDE, Nitin A. ,  KARHADE, Omkar G.

IPC: H01L23/48

Abstract: A microelectronic structure includes a substrate having a first surface and a cavity extending into the substrate from the substrate first surface, a first microelectronic device and a second microelectronic device attached to the substrate first surface, and a bridge disposed within the substrate cavity and attached to the first microelectronic device and to the second microelectronic device. The bridge includes a plurality conductive vias extending from a first surface to an opposing second surface of the bridge, wherein the conductive vias are electrically coupled to deliver electrical signals from the substrate to the first microelectronic device and the second microelectronic device. The bridge further creates at least one electrical signal connection between the first microelectronic device and the second microelectronic device.