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    WEARABLE COMPUTING DEVICE
    1.
    发明申请
    WEARABLE COMPUTING DEVICE 审中-公开
    可擦写计算设备

    公开(公告)号：WO2016099462A1

    公开(公告)日：2016-06-23

    申请号：PCT/US2014/070632

    申请日：2014-12-16

    Applicant: INTEL CORPORATION

    Inventor： ALBERS, Sven ,  REINGRUBER, Klaus ,  OSSIANDER, Teodora ,  WOLTER, Andreas ,  KOLLER, Sonja ,  SEIDEMANN, Georg ,  PROSCHWITZ, Jan ,  BARTH, Hans-Joachim ,  ELSHOF, Bastiaan

    IPC: G06F3/01

    CPC classification number: G06F3/044 ,  G01L1/24 ,  G06F1/163 ,  G06F3/03547 ,  G06F3/038 ,  G06F3/042 ,  G06F3/045 ,  G06F2203/04102 ,  G06F2203/04109 ,  H04B1/385

    Abstract: Some forms relate to wearable computing devices that include a "touch pad" like interface. In some forms, the example wearable computing devices may be integrated with (or attached to) textiles (i.e. clothing). In other forms, the example wearable computing devices may be attached directly to the skin of someone (i.e., similar to a bandage) that utilizes any of the example wearable computing devices. The example wearable computing devices include a flexible touch pad that may allow a user of the wearable computing device to more easily operate the wearable computing device. The example wearable computing devices described herein may include a variety of electronics. Some examples include a power supply and/or a communication device among other types of electronics.

    Abstract translation: 一些形式涉及包括诸如接口的“触摸板”的可穿戴计算设备。 在一些形式中，可穿戴式计算设备的示例可以与（或附着）纺织品（即服装）集成。 在其他形式中，可穿戴式计算设备的示例可以直接附接到使用任何示例性可穿戴计算设备的某人的皮肤（即类似于绷带）。 示例性可穿戴计算设备包括柔性触摸板，其可以允许可穿戴计算设备的用户更容易地操作可穿戴式计算设备。 本文所述的示例性可穿戴计算设备可以包括各种电子设备。 一些示例包括电源和/或其他类型的电子设备中的通信设备。

    INTEGRATED CIRCUIT PACKAGE ASSEMBLIES INCLUDING A CHIP RECESS
    3.
    发明申请
    INTEGRATED CIRCUIT PACKAGE ASSEMBLIES INCLUDING A CHIP RECESS 审中-公开
    集成电路封装组件，包括芯片存储器

    公开(公告)号：WO2018004930A1

    公开(公告)日：2018-01-04

    申请号：PCT/US2017/035047

    申请日：2017-05-30

    Applicant: INTEL CORPORATION

    Inventor： SEIDEMANN, Georg ,  REINGRUBER, Klaus

    IPC: H01L25/07 ,  H01L23/28 ,  H01L21/56 ,  H01L23/522

    Abstract: IC package assemblies including a molding compound in which an IC chip surface is recessed relative to the molding compound. Thickness of the IC chip may be reduced relative to its thickness during the molding process. Another IC chip, heat spreader, etc. may then occupy the resultant recess framed by the molding compound to achieve a fine stacking pitch. In some embodiments, a package-on-package (PoP) assembly includes a center-molded IC chip flip-chip-bonded to a first package substrate. A second substrate to which a second IC chip is flip-chip bonded is then electrically coupled to the first substrate by through-molding vias. Within the PoP assembly, the second IC chip may be disposed back-to-back with the center-molded IC chip so as to occupy the recess framed by the molding compound.

    Abstract translation: IC封装组件包括其中IC芯片表面相对于模制化合物凹陷的模塑料。 在模制过程中，IC芯片的厚度可以相对于其厚度减小。 然后，另一个IC芯片，散热器等可以占据由模制化合物框起的合成凹陷以实现精细的堆叠间距。 在一些实施例中，层叠封装（PoP）组件包括倒装芯片键合到第一封装衬底的中心模制IC芯片。 然后将第二IC芯片倒装芯片接合到的第二衬底通过贯通模制通孔电耦合到第一衬底。 在PoP组件内，第二IC芯片可以与中心模制的IC芯片背靠背地布置，以便占据由模塑料构成的凹陷。

    SEMICONDUCTOR DEVICES AND METHODS FOR FORMING A SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS FOR FORMING A SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：WO2023049658A1

    公开(公告)日：2023-03-30

    申请号：PCT/US2022/076517

    申请日：2022-09-16

    Applicant: INTEL CORPORATION

    Inventor： SEIDEMANN, Georg ,  OSTERMAYR, Martin ,  LUTZ, Walther ,  ASSENMACHER, Joachim

    IPC: H01L23/48 ,  H01L21/8234 ,  H01L21/768 ,  H01L23/50 ,  H01L23/498 ,  H01L23/00 ,  H01L23/495 ,  H01L23/367 ,  H01L23/31

    Abstract: A semiconductor device is provided. The semiconductor device comprises a semiconductor die comprising a semiconductor substrate and a plurality of transistors arranged at a front side of the semiconductor substrate. Further, the semiconductor die comprises a first electrically conductive structure extending from the front side of the semiconductor substrate to a backside of the semiconductor substrate and a second electrically conductive structure extending from the front side of the semiconductor substrate to the backside of the semiconductor substrate. The semiconductor device further comprises an interposer directly attached to the backside of the semiconductor substrate. The interposer comprises a first trace electrically connected to the first electrically conductive structure of the semiconductor die. Further the interposer comprises the first trace or a second trace electrically connected to the second electrically conductive structure of the semiconductor die.

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