公开(公告)号：EP1721865A3

公开(公告)日：2011-09-28

申请号：EP06075963.6

申请日：2006-04-28

Applicant: Delphi Technologies, Inc.

Inventor： Rich, David B. ,  Crist, Steven M.

IPC: B81C1/00 ,  G01P15/12

CPC classification number: B81C1/00142 ,  B81B2201/0235 ,  B81B2201/032 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81C2201/016 ,  G01P15/0802 ,  G01P15/123 ,  G01P2015/0828

Abstract: A technique for manufacturing a piezoresistive sensing structure (170) includes a number of process steps. Initially, a piezoresistive element (108) is implanted into a first side of an assembly (102,106,104A) that includes a semiconductor material (102,104A). A passivation layer (110A) is then formed on the first side of the assembly (102,106,104A) over the element (108). The passivation layer (110A) is then removed from selected areas on the first side of the assembly (102,106,104A). A first mask is then provided on the passivation layer (110A) in a desired pattern. A beam (152), which includes the element (108), is then formed in the assembly over at least a portion of the assembly (102,106,104A) that is to provide a cavity (103). The passivation layer (110A) provides a second mask, in the formation of the beam (152), that determines a width of the formed beam (152).

公开(公告)号：EP1509946A4

公开(公告)日：2010-08-18

申请号：EP03756181

申请日：2003-05-14

Applicant: SILICON LIGHT MACHINES CORP

Inventor： HUNTER JAMES A

IPC: B81C1/00 ,  G02B5/18 ,  G02B26/00 ,  G02B26/08 ,  G02F1/00 ,  G02F1/03 ,  G02F1/07 ,  G02F1/13 ,  G02F1/1368 ,  H01L21/00 ,  H01L21/28 ,  H01L21/302 ,  H01L21/82 ,  H01L21/8234 ,  H01L27/06 ,  H01L29/423 ,  H01L29/49 ,  H01L31/153

CPC classification number: G02B26/0808 ,  B81B2201/045 ,  B81B2207/015 ,  B81B2207/07 ,  B81C1/00246 ,  B81C2201/016 ,  B81C2203/0735 ,  B81C2203/0778 ,  H01L27/0611

公开(公告)号：EP1532071A2

公开(公告)日：2005-05-25

申请号：EP03792106.1

申请日：2003-05-06

Applicant: ROBERT BOSCH GMBH

Inventor： LAERMER, Franz ,  MUELLER, Lutz ,  BERNHARD, Winfried

IPC: B81C1/00

CPC classification number: H01L21/02252 ,  B81B2203/033 ,  B81C1/00571 ,  B81C2201/016 ,  H01L21/02123 ,  H01L21/02238 ,  H01L21/02337 ,  H01L21/02343 ,  H01L21/02359 ,  H01L21/3121 ,  H01L21/31612 ,  Y10S438/958

Abstract: The invention relates to a layer system comprising a silicon layer (11), at least some sections of whose surface are provided with a passivation layer (17), the latter (17) consisting of a first, at least predominantly inorganic sub-layer (14) and a second sub-layer (15). The latter (15) is composed of an organic compound comprising silicon or a similar material. The second sub-layer (15) in particular takes the form of a self-assembled monolayer. The invention also relates to a method for producing a passivation layer (17) on a silicon layer (11), whereby a first inorganic sub-layer (14) is produced on said layer (11) and a second sub-layer (15), containing an organic compound containing silicon or consisting of said compound, is produced on at least some sections of the first sub-layer (14), whereby the sub-layers form the passivation layer (17). The inventive layer system or the inventive method are particularly suitable for producing cantilever structures in silicon.

Abstract translation: 本发明涉及一种包括硅层（11）的层系统，其至少一部分表面设置有钝化层（17），钝化层（17）由第一，至少主要是无机子层（ 14）和第二子层（15）。 后者（15）由包含硅或类似材料的有机化合物组成。 第二子层（15）特别采取自组装单层的形式。 本发明还涉及一种在硅层（11）上制造钝化层（17）的方法，由此在所述层（11）和第二子层（15）上产生第一无机子层（14） 在所述第一子层（14）的至少一些部分上产生包含含硅或由所述化合物组成的有机化合物，由此所述子层形成所述钝化层（17）。 本发明的层系统或本发明的方法特别适用于生产硅中的悬臂结构。

公开(公告)号：EP1077475A3

公开(公告)日：2003-04-02

申请号：EP00117155.2

申请日：2000-08-10

Applicant: Applied Materials, Inc.

Inventor： Podlesnik, Dragan V. ,  Chinn, Jeffrey D. ,  Lill, Thorsten B. ,  Pan, Shaoher X. ,  Khan, Anisul ,  Wang, Joan Yiqiong ,  Li, Maocheng

IPC: H01L21/3065 ,  B81C1/00 ,  H01L21/308 ,  H01L21/768

CPC classification number: H01L27/1087 ,  B81B2201/052 ,  B81B2203/0315 ,  B81B2203/033 ,  B81C1/00119 ,  B81C2201/016 ,  H01L21/3065 ,  H01L21/3086

Abstract: The present disclosure pertains to our discovery of a particularly efficient method for etching a multi-part cavity in a substrate. The method provides for first etching a shaped opening, depositing a protective layer over at least a portion of the inner surface of the shaped opening, and then etching a shaped cavity directly beneath and in continuous communication with the shaped opening. The protective layer protects the etch profile of the shaped opening during etching of the shaped cavity, so that the shaped opening and the shaped cavity can be etched to have different shapes, if desired. In particular embodiments of the method of the invention, lateral etch barrier layers and/or implanted etch stops are also used to direct the etching process. The method of the invention can be applied to any application where it is necessary or desirable to provide a shaped opening and an underlying shaped cavity having varying shapes. The method is also useful whenever it is necessary to maintain tight control over the dimensions of the shaped opening.

公开(公告)号：EP1532071B1

公开(公告)日：2016-11-23

申请号：EP03792106.1

申请日：2003-05-06

Applicant: ROBERT BOSCH GMBH

Inventor： LAERMER, Franz ,  MUELLER, Lutz ,  BERNHARD, Winfried

IPC: B81C1/00

CPC classification number: H01L21/02252 ,  B81B2203/033 ,  B81C1/00571 ,  B81C2201/016 ,  H01L21/02123 ,  H01L21/02238 ,  H01L21/02337 ,  H01L21/02343 ,  H01L21/02359 ,  H01L21/3121 ,  H01L21/31612 ,  Y10S438/958

公开(公告)号：EP1721865B1

公开(公告)日：2012-12-26

申请号：EP06075963.6

申请日：2006-04-28

Applicant: Delphi Technologies, Inc.

Inventor： Rich, David B. ,  Crist, Steven M.

IPC: B81C1/00 ,  G01P15/12

CPC classification number: B81C1/00142 ,  B81B2201/0235 ,  B81B2201/032 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81C2201/016 ,  G01P15/0802 ,  G01P15/123 ,  G01P2015/0828

公开(公告)号：EP2450308A1

公开(公告)日：2012-05-09

申请号：EP10190268.2

申请日：2010-11-05

Applicant: NXP B.V.

Inventor： Van Dal, Marcus Johannes Henricus ,  Humbert, Aurelie ,  Matthias, Merz ,  Ponomarev, Youri Victorovitch

IPC: B81B7/00

CPC classification number: B81B7/0012 ,  B81B2201/0214 ,  B81B2207/015 ,  B81C2201/016

Abstract: Disclosed is a method of manufacturing an integrated circuit having a substrate comprising a plurality of components and a metallization stack over said components, the metallization stack comprising a first sensing element (120) and a second sensing element (140) adjacent to the first sensing element, the method comprising depositing a moisture-impenetrable layer (150) over the metallization stack; depositing a passivation layer (510; 520) over the moisture-impenetrable layer; patterning the passivation layer and the underlying moisture-impenetrable layer such that a trench (600) is formed surrounding a region (810, 820) of the passivation layer over the first or second sensing element, the depth of said trench extending to a portion (310) of the metallization stack; depositing a layer of a further moisture-impenetrable material (700) over the resultant structure thereby filling said trench; patterning said further moisture-impenetrable material to expose a portion of the passivation layer in a region (810) above the first sensing element; and removing the exposed portion of the passivation layer to expose the first sensing element. A thus manufactured IC and article comprising such an IC are also disclosed.

Abstract translation: 本发明公开了制造具有基片，其包括组分的多元并在所述组件的金属化叠层集成电路的方法，所述金属化叠层包括第一感测元件（120）和第二感测元件（140）相邻的第一感测元件 中，该方法包括：在沉积在金属化堆叠中的水分难以渗透层（150）; 沉积钝化层（510; 520）在所述湿气不可透过的层; 图案化钝化层和底层水分不可渗过的层的搜索做了沟槽（600）形成在第一或第二感测元件围绕所述钝化层的区域（810，820），所述沟槽的深度延伸到部分（ 310）金属化叠层的; 沉积在得到的结构，从而填充所述沟槽的进一步湿气不可透过的材料（700）层; 所述图案化进一步水分不可渗过的材料，以在所述第一感测元件上方的区域（810）露出所述钝化层的一部分; 和去除钝化层的暴露部分，以暴露所述第一感测元件。 一个如此制造IC和物品，包括寻求IC这样的游离缺失盘。

公开(公告)号：EP1289876B1

公开(公告)日：2008-01-16

申请号：EP01951392.8

申请日：2001-06-13

Applicant: memsfab GmbH

Inventor： BERTZ, Andreas ,  GESSNER, Thomas ,  KÜCHLER, Matthias ,  KNÖFLER, Roman

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0086 ,  B81B2203/033 ,  B81C2201/016

Abstract: The invention relates to a single crystal doped silicon microstructure comprising at least one functional element (2.1, 2.2) and placed in a substrate (1). Also disclosed is the method for producing said microstructure. According to the invention, the functional element (2.1, 2.2) is mechanically and electrically separated from the substrate on all sides by means of insulating gaps (5, 5a), and is connected in at least one position to a first structure (4a) of an electrically conductive layer (S) which is electrically insulated from the substrate (1) by means of an insulating layer (3). The functional element is thereby fixed in position in relation to the substrate (1) by means of said electrically conductive layer. The functional element is extracted from the substrate in such a way that the isolation gaps are present on all sides in relation to the substrate (1). The electrically conductive layer (S) is applied in such a way that it is connected to the functional element by means of contact fingers, fixing the functional element firmly in position.

公开(公告)号：EP1509946A1

公开(公告)日：2005-03-02

申请号：EP03756181.8

申请日：2003-05-14

Applicant: Silicon Light Machines Corporation

Inventor： HUNTER, James, A.

IPC: H01L21/00 ,  H01L21/82 ,  H01L21/302

CPC classification number: G02B26/0808 ,  B81B2201/045 ,  B81B2207/015 ,  B81B2207/07 ,  B81C1/00246 ,  B81C2201/016 ,  B81C2203/0735 ,  B81C2203/0778 ,  H01L27/0611

Abstract: An integrated device including one or more device drivers and a diffractive light modulator monolithically coupled to the one or more driver circuits. The one or more driver circuits are configured to process received control signals and to transmit the processed control signals to the diffractive light modulator. A method of fabricating the integrated device preferably comprises fabricating a front-end portion for each of a plurality of transistors, isolating the front-end portions of the plurality of transistors, fabricating a front-end portion of a diffractive light modulator, isolating the front-end portion of the diffractive light modulator, fabricating interconnects for the plurality of transistors, applying an open array mask and wet etch to access the diffractive light modulator, and fabricating a back-end portion of the diffractive light modulator, thereby monolithically coupling the diffractive light modulator and the plurality of transistors.

公开(公告)号：EP1441976A2

公开(公告)日：2004-08-04

申请号：EP02772043.2

申请日：2002-09-05

Applicant: ROBERT BOSCH GMBH

Inventor： LAERMER, Franz

IPC: B81B3/00

CPC classification number: G01C19/5712 ,  B81B3/0086 ,  B81B2201/0242 ,  B81B2203/0136 ,  B81B2203/033 ,  B81C1/00801 ,  B81C2201/0104 ,  B81C2201/016

Abstract: The invention concerns a micromechanical component comprising a substrate (17) whereon is deposited a micromechanical functional layer (15) made of a first material. The invention is characterized in that the functional layer (15) includes first and second zones (15a, 15c) which are linked by a third zone (15b; 220a,b; 320a,b; 420a-d; 520; 520a-h) made of a second material (20). At least one of the zones (15a or 15b; 220a,b; 320a,b; 420a-d; 520; 520a-h or 15c) forms part of a mobile structure (32) which is suspended above the substrate (17). The invention also concerns a method for producing such a micromechanical component.

Abstract translation: 本发明涉及一种包括基底（17）的微机械构件，其上沉积由第一材料制成的微机械功能层（15）。 本发明的特征在于功能层（15）包括由第三区域（15b; 220a，b; 320a，b; 420a-d; 520; 520a-h）连接的第一和第二区域（15a，15c） 由第二材料（20）制成。 至少一个区域（15a或15b; 220a，b; 320a，b; 420a-d; 520; 520a-h或15c）形成悬挂在衬底（17）上方的移动结构（32）的一部分。 本发明还涉及用于制造这种微机械部件的方法。