Fabrication of silicon structures by single side, multiple step etching process
    3.
    发明公开
    Fabrication of silicon structures by single side, multiple step etching process 失效
    Herstellung von Siliciumstrukturen durch einseitigen Mehrschritt-Ätzprozess。

    公开(公告)号:EP0359417A2

    公开(公告)日:1990-03-21

    申请号:EP89308476.4

    申请日:1989-08-22

    Abstract: Three dimensional silicon structures are fabricated from {100} silicon wafers by a single side, multiple step ODE etching process. All etching masks (26, 28) are formed one on top of the other prior to the initiation of etching, with the coarsest mask (28) formed last and used first. Once the coarse anisotropic etching is completed, the coarse mask is removed and the finer anisotropic etching is done. The three dimensional structure may be a thermal ink jet channel plate, in which case the etching process is a two-step process in which the coarse etching step provides the ink reservoir (30) and the fine etching step provides the ink channels (32).

    Abstract translation: 通过单面,多步ODE蚀刻工艺由{100}硅晶片制造三维硅结构。 所有蚀刻掩模(26,28)在蚀刻开始之前一个在另一个之上形成,最粗糙的掩模(28)最后形成并首先被使用。 一旦粗大的各向异性蚀刻完成,粗糙掩模被去除,并且进行更精细的各向异性蚀刻。 三维结构可以是热喷墨通道板,在这种情况下,蚀刻工艺是两步法,其中粗蚀刻步骤提供墨储存器(30),并且精细蚀刻步骤提供墨通道(32) 。

    Electrostatically actuated devices
    8.
    发明公开
    Electrostatically actuated devices 有权
    Elektrostatischgesteuerte Vorrichtungen

    公开(公告)号:EP1199174A1

    公开(公告)日:2002-04-24

    申请号:EP01308476.9

    申请日:2001-10-03

    Abstract: An electrostatic injet head (10) having an inner structure (56) on the bottom of the top (53) of the membrane (50) for isolating it for the conductor (40), and an outer structure (58), away from the center of the membrane (50), on the bottom of the top (53) of the membrane (50) to stop excessive flexing of the membrane (50) leading to inter-electrode contact. The invention can be used in various silicon-based actuators, including fluid pumps and optical switching devices.

    Abstract translation: 在所述膜(50)的顶部(53)的底部具有用于将所述导体(40)隔离的内部结构(56)的静电喷射头(10)和远离所述导体(40)的外部结构(58) 在膜(50)的顶部(53)的底部上的膜(50)的中心,以阻止膜(50)的过度弯曲,导致电极间接触。 本发明可用于各种基于硅的致动器,包括流体泵和光学开关装置。

    A through hole formation method and a substrate provided with a through hole
    9.
    发明公开
    A through hole formation method and a substrate provided with a through hole 失效
    一种用于通孔的制造方法,以及具有这样的通孔的硅衬底

    公开(公告)号:EP0886307A2

    公开(公告)日:1998-12-23

    申请号:EP98111247.7

    申请日:1998-06-18

    Inventor: Ohkuma, Norio

    Abstract: A method of Si anisotropic etching makes it possible to relax the restrictions imposed upon the processing configuration of an Si substrate provided with the 〈100〉 plane orientation. This Si anisotropic etching method can be preferably used for the formation of the ink supply opening of an ink jet head, for example. When an Si material (Si substrate) having the 〈100〉 crystal plane orientation is processed by this anisotropic etching method, it is arranged to give heat treatment to such Si material in advance before etching. Thus, the processed section can be obtained in a bent configuration formed by the two 〈111〉 planes of crystal plane orientation. Therefore, the etching initiation surface is made smaller than that needed for the conventional art even when the same width should be obtained for a penetrating process, hence making a chip smaller accordingly for the reduction of costs.

    Abstract translation: 硅的各向异性蚀刻的方法,使得可以缓和在Si的处理配置所施加的限制基片设置有与郎&100响面取向。 该Si各向异性蚀刻方法,可以优选地用于喷墨头的供墨开口的形成中,例如。 当具有与郎&100响与晶面取向Si材料(Si衬底)由该各向异性蚀刻方法处理,它被布置成给热处理蚀刻之前预先求Si材料。 因此,经处理的部分可以在由两个&郎&111&形成的弯曲结构而获得响&晶面取向的平面。 因此,蚀刻引发表面是由比所需要的现有技术,即使在相同的宽度应当获得用于穿透过程,因此制造更小的芯片为相应的成本的降低更小。

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