公开(公告)号：EP0395544A1

公开(公告)日：1990-10-31

申请号：EP90420202.5

申请日：1990-04-23

Applicant: Société Anonyme de Traitement des Métaux et Alliages SATMA

Inventor： Rabiet, Jacques ,  Gimenez, Philippe ,  Guillou, Rémi ,  Drapier, Claude

IPC: H05K1/05 ,  H01L23/14 ,  C25D11/12

CPC classification number: C25D11/12 ,  H01L2924/0002 ,  H05K1/053 ,  H05K3/386 ,  H05K2201/0116 ,  H05K2203/0315 ,  H05K2203/1147 ,  Y10T428/24322 ,  Y10T428/24851 ,  Y10T428/24926 ,  H01L2924/00

Abstract: Substrats comportant une embase d'aluminium, un isolant constitué d'une pellicule d'alumine obtenue par anodisation de ladite embase sur au moins une de ses faces et au moins un film métallique destiné à être transformé par gravure chimique en un réseau de conducteurs caractérisés en ce que ladite pellicule d'alumine est formée d'une zone compacte uniforme, adhérente à l'aluminium, ayant une épaisseur supérieure à 500 nm et d'une couche poreuse à surface externe rugueuse.
Le procédé permettant d'obtenir de tels substrats est caractérisé en ce que l'embase est soumise sur au moins une de ses faces à un traitement dans un bain d'anodisation poreuse puis dans un bain d'anodisation dite "barrière".
Cette invention trouve son application dans la réalisation de substrats pour circuits d'interconnection simple face, et double face à trous métallisés, circuits conducteurs multicouches, lesdits substrats étant à conformation plane ou spatiale, et de réseaux résistifs.

Abstract translation: 基材包括铝基材，由通过在其至少一个表面上阳极氧化所述基材而得到的氧化铝的薄膜和通过化学蚀刻转化为导体网络的至少一种金属薄膜构成的绝缘体，其特征在于， 所述氧化铝膜由均匀的致密区域组成，附着在厚度大于500nm的铝上以及具有粗糙外表面的多孔层。 ...获得能够获得这种基材的方法的特征在于，将基底的至少一个表面经受多孔阳极氧化浴中的处理，然后在所谓的“屏障”阳极氧化浴中进行处理。 ...本发明可以应用于制造具有金属化孔的单面和双面互连电路的衬底，多层导电电路，所述衬底具有平面或空间配置以及电阻网络。

公开(公告)号：EP0385142A2

公开(公告)日：1990-09-05

申请号：EP90102348.1

申请日：1990-02-07

Applicant: FUJITSU LIMITED

Inventor： Tsuji, Hiroki ,  Kawano, Kyoichiro ,  Murase, Teruo

IPC: H01R13/02 ,  H01R23/72 ,  H01R9/09 ,  H01R4/02

CPC classification number: H05K3/244 ,  H01R4/02 ,  H05K3/3431 ,  H05K3/3463 ,  H05K3/36 ,  H05K3/4007 ,  H05K2201/0116 ,  H05K2201/0373 ,  H05K2201/2036 ,  H05K2203/0723 ,  Y10T428/12681

Abstract: A porous silver plating layer is provided to the surface of pads of a printed circuit board and the surface of contacts provided at the pads of the mother board and these layers are respectively impregnated by tin-zinc alloy and gallium. The electrical connection is established between the pads of printed circuit board and pads of the mother board through existence of liquid alloy by placing these plating layer in contact with each other. For the one printed circuit board having the pads and spacer, the gallium particles are adhered to the pads, while the solder is tentatively adhered to the spacer and for the other printed circuit board having the pads and connecting pads, the tin or indium layer is provided at the surface of pads, then the spacer of former printed circuit board is positioned and fixed to the connecting pad of the other printed circuit board. Thereby, electrical connection can be formed through the contact of gallium-tin or gallium-indium liquid alloy between the pads of both printed circuit boards.

Abstract translation: 在印刷电路板的焊盘的表面设置多孔镀银层，并且设置在母板的焊盘上的触点的表面分别用锡 - 锌合金和镓浸渍。 通过使这些镀层彼此接触，通过存在液体合金，在印刷电路板的焊盘和母板的焊盘之间建立电连接。 对于具有焊盘和间隔物的一个印刷电路板，镓颗粒粘附到焊盘，而焊料暂时粘附到间隔件，并且对于具有焊盘和连接焊盘的另一个印刷电路板，锡或铟层是 设置在焊盘的表面，然后将前印刷电路板的间隔件定位并固定到另一个印刷电路板的连接焊盘。 因此，可以通过在两个印刷电路板的焊盘之间的镓锡或镓 - 铟液体合金的接触来形成电连接。

公开(公告)号：EP0159182B1

公开(公告)日：1989-10-11

申请号：EP85302554.2

申请日：1985-04-11

Applicant: JUNKOSHA CO. LTD.

Inventor： Suzuki, Hirosuke

IPC: H01B7/08 ,  H01P3/08

CPC classification number: H01P3/088 ,  H01B7/0838 ,  H05K1/024 ,  H05K1/0393 ,  H05K3/28 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/0715

公开(公告)号：EP0328325A1

公开(公告)日：1989-08-16

申请号：EP89301104.9

申请日：1989-02-03

Applicant: RAYCHEM LIMITED

Inventor： Horner, Patrick James ,  Ludden, Michael Joseph ,  Nyholm, Peter ,  Smith, Nicholas J.G. ,  Penneck, Richard John

IPC: H01L23/14 ,  H01L23/50 ,  H01L21/48 ,  H05K1/03

CPC classification number: G03F7/039 ,  B23K1/0016 ,  B23K20/023 ,  B23K31/02 ,  B23K2201/40 ,  H01L21/4803 ,  H01L21/486 ,  H01L23/145 ,  H01L23/3733 ,  H01L23/49827 ,  H01L23/4985 ,  H01L2924/0002 ,  H05K1/0326 ,  H05K1/0333 ,  H05K1/0346 ,  H05K1/036 ,  H05K3/0032 ,  H05K2201/0116 ,  H05K2201/0154 ,  H05K2201/10378 ,  Y10S428/901 ,  Y10T428/24322 ,  Y10T428/24802 ,  Y10T428/24917 ,  Y10T428/31504 ,  Y10T428/31721 ,  Y10T428/31725 ,  H01L2924/00

Abstract: A sheet laminate of polyimide and amorphous polyamide especially suitable for making anisotropically electrically conductive articles by laser ablation drilling followed by metal plating. Preferred polyimides include those derived from polymerisation of 4,4′-biphenyldianhydride and 4,4′-diaminobiphenylether or p-phenylene diamine. Preferred amorphous polyamides include those derived from condensation of terephthalic acid with isomers of trimethylhexamethylene­diamine.

Abstract translation: 聚酰亚胺和非晶聚酰胺的片层压材料特别适用于通过激光烧蚀钻孔，然后进行金属电镀制造各向异性导电制品。 优选的聚酰亚胺包括衍生自4,4分钟 - 联苯二酐和4,4'-二氨基二苯基醚或对 - 苯二胺的聚合的那些。 优选的无定形聚酰胺包括衍生自对苯二甲酸与三甲基六亚甲基二胺的异构体缩合的那些。

公开(公告)号：EP0254238A2

公开(公告)日：1988-01-27

申请号：EP87110431.1

申请日：1987-07-18

Applicant: E.I. DU PONT DE NEMOURS AND COMPANY

Inventor： Martin, Paul James ,  Dueber, Thomas Eugene

IPC: H01L21/70

CPC classification number: H05K3/28 ,  C04B41/52 ,  C04B2111/00844 ,  H01L21/4807 ,  H05K1/0306 ,  H05K3/4667 ,  H05K2201/0116 ,  H05K2201/017 ,  H05K2201/0195 ,  C04B41/5022 ,  C04B41/5025

Abstract: A method for inhibiting the formation of blisters during the firing of intermediate layers of fired multilayer electronic components comprising the sequential steps of:

(1) applying to a substrate a first and second layer of finely divided particles of dielectric solids and glass dispersed in organic medium; and
(2) firing the layers to effect volatilization of the organic medium therefrom, liquid phase sintering of the glass components and densification of both layers, the softening point of the glass, the particle size of the glass and the ratio of glass to dielectric solids in both layers being adjusted in such manner that when the layers are fired, the first layer is porous and the second layer is nonporous.

Abstract translation: 一种用于在燃烧的多层电子部件的中间层的烧制过程中抑制起泡形成的方法，包括以下顺序步骤：（1）向介质施加第一和第二层细小的电介质固体颗粒和分散在有机介质中的玻璃 ; 和（2）焙烧这些层以实现有机介质的挥发，玻璃组分的液相烧结和两层致密化，玻璃的软化点，玻璃的粒径以及玻璃与介电固体的比例 在两层中的调节方式使得当层被烧制时，第一层是多孔的，而第二层是无孔的。

公开(公告)号：EP0159182A3

公开(公告)日：1987-01-21

申请号：EP85302554

申请日：1985-04-11

Applicant: JUNKOSHA CO. LTD.

Inventor： Suzuki, Hirosuke

IPC: H01B07/08 ,  H01P03/08

CPC classification number: H01P3/088 ,  H01B7/0838 ,  H05K1/024 ,  H05K1/0393 ,  H05K3/28 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/0715

Abstract: A strip line cable, for transmission of electromagnetic waves in the millimeter wave length range, has a plurality of face to face conductors in pairs (such as 2a,2a') the conductors being separated from their paired counterparts by a porous plastic dielectric insulation material (1), the cable having a jacket (3). The improvement comprises a porous plastic dielectric material (4) being, in addition, placed between each conductor and the jacket material, thereby resulting in each conductor being effectively surrounded by porous plastic dielectric insulating material.

公开(公告)号：EP0204446A2

公开(公告)日：1986-12-10

申请号：EP86303655.4

申请日：1986-05-14

Applicant: JUNKOSHA CO. LTD.

Inventor： Suzuki, Hirosuke ,  Umebayashi, Tetsuro

IPC: H01B7/08

CPC classification number: H01B7/0838 ,  H05K1/0219 ,  H05K1/024 ,  H05K1/0313 ,  H05K3/28 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0195 ,  H05K2201/09236

Abstract: An electrical transmission unit line is provided comprising a porous dielectric layer (2) having positioned on one side thereof a pair of narrow, parallel elongate electrical conductors (such as 1a 1 , 1 a2) and on the other side thereof, opposite the pair of conductors and extending transversely across both wires of the pair and parallel thereto, a wide ground conductor (such as 1a 3 ). An electrical transmission line having a plurality of such unit lines is also provided. The porous dielectric is preferably porous, expanded polytetrafluoroethylene. The transmission lines are covered with an electrically insulating material (3), preferably a nonporous plastic.

Abstract translation: 提供了一种电传输单元线，其包括多孔介电层（2），多孔介电层（2）在其一侧上定位有一对窄的平行细长电导体（例如1a1,1a2）并且在其另一侧上与该对导体 并且横向延伸穿过该对的两个导线并且与其平行，宽的接地导体（例如1a3）。 还提供了具有多个这种单元线的电传输线。 多孔电介质优选是多孔的膨胀型聚四氟乙烯。 传输线用电绝缘材料（3）覆盖，优选无孔塑料。

公开(公告)号：EP0160418A3

公开(公告)日：1986-11-26

申请号：EP85302368

申请日：1985-04-03

Applicant: JUNKOSHA CO. LTD.

Inventor： Suzuki, Hirosuke

IPC: H05K01/03

CPC classification number: H05K1/036 ,  H05K3/386 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0209 ,  H05K2201/0355 ,  Y10S428/901 ,  Y10T428/31544

Abstract: A board for use as a printed circuit board is provided comprising at least one layer of metal firmly bonded in laminar contact with at least one layer of solid, sintered polytetrafluoroethylene (PTFE). In one embodiment, the solid PTFE layer contains fibers of porous, expanded, sintered PTFE mixed within it. In another embodiment, the solid PTFE layer is firmly bonded to the metal layer on one side and is firmly bonded on the other side to a layer of porous, expanded, sintered PTFE.

Abstract translation: 提供一种用作印刷电路板的板，其包括至少一层金属层，该金属层与至少一层固体烧结聚四氟乙烯（PTFE）层压接触并牢固结合。 在一个实施例中，PTFE固体层含有混合在其中的多孔的，膨胀的，烧结的PTFE纤维。 在另一个实施方案中，固体PTFE层在一侧牢固地结合到金属层并且在另一侧牢固地结合到多孔的膨胀烧结PTFE层。

公开(公告)号：EP2985788B1

公开(公告)日：2017-10-04

申请号：EP14181005.1

申请日：2014-08-14

Applicant: ABB Technology Oy

Inventor： Kearney, Daniel ,  Agostini, Francesco ,  Cottet, Didier ,  Torresin, Daniele ,  Habert, Mathieu

IPC: H01L23/473 ,  H01L23/538 ,  H05K1/02 ,  H01L23/373

CPC classification number: H01L23/473 ,  H01L23/3121 ,  H01L23/5389 ,  H01L2924/0002 ,  H05K1/0272 ,  H05K1/185 ,  H05K3/4697 ,  H05K2201/0116 ,  H05K2201/064 ,  H01L2924/00

Abstract: The present disclosure relates to a power semiconductor module comprising a printed circuit board (PCB), and to method of cooling such a power semiconductor module. The module comprises a power semiconductor device and an island of thermally conducting foam embedded into the printed circuit board. The power semiconductor device and the island of thermally conducting foam are positioned on top of each other, and the island is arranged to form a path for a flowing coolant cooling the power semiconductor device.

Abstract translation: 本公开涉及包括印刷电路板（PCB）的功率半导体模块，并且涉及冷却这种功率半导体模块的方法。 该模块包括功率半导体器件和嵌入印刷电路板中的导热泡沫岛。 功率半导体器件和导热泡沫岛被定位在彼此的顶部上，并且岛被布置为形成用于冷却功率半导体器件的流动冷却剂的路径。

公开(公告)号：EP2224797A4

公开(公告)日：2017-05-31

申请号：EP08848612

申请日：2008-11-11

Applicant: SEIREN CO LTD

Inventor： TSUBOTA MASANORI ,  SHIOMI HIDEKAZU ,  OGATA HIROSHI

IPC: H05K3/38 ,  H05K3/12 ,  H05K3/18

CPC classification number: H05K3/1208 ,  H05K3/182 ,  H05K3/207 ,  H05K3/386 ,  H05K2201/0116 ,  H05K2201/0209 ,  H05K2203/0113 ,  H05K2203/0709