摘要:
Multiple microelectromechanical systems (MEMS) on a substrate (20) are capped with a cover (28) using a layer that may function as a bonding agent, separation layer, and hermetic seal. A substrate (20) has a first side (20A) with multiple MEMS devices. A cover (28) is formed with through-holes (40) for vias (40), and with standoff posts (34) for layer registration and separation. An adhesive sheet (42) is patterned with cutouts (44) for the MEMS devices, vias (40), and standoff posts (34). The adhesive sheet (42) is tacked to the cover (28), then placed on the mems substrate (20) and heated to bond the layers. The via holes (40) may be metalized with leads for circuit board (58) connection. The mems units (22) may be diced from the substrate (20) after sealing, thus protecting them from contaminants.
摘要:
A package structure (10) includes a dielectric layer (14), at least one semiconductor device (12) attached to the dielectric layer (14), one or more dielectric sheets (26) applied to the dielectric layer (14) and about the semiconductor device(s) (12) to embed the semiconductor device(s) (12) therein, and a plurality of vias (30,36) formed to the semiconductor device(s) (12) that are formed in at least one of the dielectric layer (14) and the one or more dielectric sheets (26). The package structure (10) also includes metal interconnects (38) formed in the vias (30,36) and on one or more outward facing surfaces (18,20) of the package structure (10) to form electrical interconnections to the semiconductor device(s) (12). The dielectric layer (14) is composed of a material that does not flow during a lamination process and each of the one or more dielectric sheets (26) is composed of a curable material configured to melt and flow when cured during the lamination process so as to fill-in any air gaps around the semiconductor device(s) (12).
摘要:
A surface-mount package structure (10) for reducing the ingress of moisture and gases thereto is disclosed. The surface-mount structure (10) includes a sub-module (14) having a dielectric layer (30), semiconductor devices (12) attached to the dielectric layer (30), a first level interconnect structure (28) electrically coupled to the semiconductor devices (12), and a second level I/O connection (16) electrically coupled to the first level interconnect (38) and formed on the dielectric layer (30), with the second level I/O connection (16) configured to connect the sub-module (14) to an external circuit. The semiconductor devices (12) of the sub-module (14) are attached to a substrate structure (18), with a dielectric material (26) positioned between the dielectric layer (30) and the substrate structure (18) to fill in gaps in the surface-mount structure (10). A diffusion barrier layer (28) is applied over the sub-module (14), adjacent the first and second level I/O connections (38,16), and extends down to the substrate structure (18) to reduce the ingress of moisture and gases from a surrounding environment into the surface-mount structure (10).
摘要:
Multiple microelectromechanical systems (MEMS) on a substrate (20) are capped with a cover (28) using a layer that may function as a bonding agent, separation layer, and hermetic seal. A substrate (20) has a first side (20A) with multiple MEMS devices. A cover (28) is formed with through-holes (40) for vias (40), and with standoff posts (34) for layer registration and separation. An adhesive sheet (42) is patterned with cutouts (44) for the MEMS devices, vias (40), and standoff posts (34). The adhesive sheet (42) is tacked to the cover (28), then placed on the mems substrate (20) and heated to bond the layers. The via holes (40) may be metalized with leads for circuit board (58) connection. The mems units (22) may be diced from the substrate (20) after sealing, thus protecting them from contaminants.
摘要:
A power module (20) includes one or more semiconductor power devices (22) having a power overlay (POL) (24) bonded thereto. A first heat sink assembly (30), is bonded to the semiconductor power devices (22) on a side opposite the POL (24). A second heat sink assembly (28) is bonded to the POL (24) opposite the side of the POL (24) bonded to the semiconductor power devices (24). The semiconductor power devices (22), POL (24), first channel heat sink assembly (30), and second channel heat sink assembly (28) together form a double side cooled power overlay module. The second channel heat sink assembly (28) is bonded to the POL (24) solely via a compliant thermal interface material (26) without the need for planarizing, brazing or metallurgical bonding.
摘要:
Multiple microelectromechanical systems (MEMS) on a substrate (20) are capped with a cover (28) using a layer that may function as a bonding agent, separation layer, and hermetic seal. A substrate (20) has a first side (20A) with multiple MEMS devices. A cover (28) is formed with through-holes (40) for vias (40), and with standoff posts (34) for layer registration and separation. An adhesive sheet (42) is patterned with cutouts (44) for the MEMS devices, vias (40), and standoff posts (34). The adhesive sheet (42) is tacked to the cover (28), then placed on the mems substrate (20) and heated to bond the layers. The via holes (40) may be metalized with leads for circuit board (58) connection. The mems units (22) may be diced from the substrate (20) after sealing, thus protecting them from contaminants.
摘要:
A device for controlling the flow of electric current is provided. The device comprises a first conductor (12); a second conductor (14) switchably coupled to the first conductor (12) to alternate between an electrically connected state with the first conductor (12) and an electrically disconnected state with the first conductor (12). At least one conductor further comprises an electrical contact (40), the electrical contact (40) comprising a solid matrix (42) comprising a plurality of pores (44); and a filler material (46) disposed within at least a portion of the plurality of pores (44). The filler material (46) has a melting point of less than about 575K. A method (50) to make an electrical contact (40) is provided. The method (50) includes the steps of: providing a substrate; providing a plurality of pores (44) on the substrate; and disposing a filler material within at least a portion of the plurality of pores (44). The filler material (46) has a melting point of less than about 575K.
摘要:
A package structure (10) includes a first dielectric layer (14), semiconductor device(s) (12,13) attached to the first dielectric layer (14), and an embedding material (24) applied to the first dielectric layer (14) so as to embed the semiconductor device (12,13) therein, the embedding material (24) comprising one or more additional dielectric layers (26). Vias (30) are formed through the first dielectric layer (14) to the at least one semiconductor device (12,13), with metal interconnects (38) formed in the vias (30) to form electrical interconnections to the semiconductor device (12,13). Input/output (I/O) connections (40) are located on one end of the package structure (10) on one or more outward facing surfaces (18,20) thereof to provide a second level connection to an external circuit. The package structure (10) interfits with a connector on the external circuit to mount the package (10) perpendicular to the external circuit, with the I/O connections (40) being electrically connected to the connector to form the second level connection to the external circuit.