公开(公告)号：EP1374314A4

公开(公告)日：2008-03-12

申请号：EP02725187

申请日：2002-03-13

Applicant: IBM

Inventor： ACOSTA RAUL E ,  CARASSO MELANIE L ,  CORDES STEVEN A ,  GROVES ROBERT A ,  LUND JENNIFER L ,  ROSNER JOANNA

IPC: H01F17/00 ,  H01F17/04 ,  H01F17/06 ,  H01F27/00 ,  H01F27/06 ,  H01F41/04 ,  H01L21/02 ,  H01L27/08 ,  H01L29/82 ,  H01L29/00

CPC classification number: H01L28/10 ,  H01F17/0006 ,  H01F17/0033 ,  H01F41/041 ,  H01L27/08

Abstract: A means for fabrication of solenoidal inductors interated in a semiconductor chip is provided. A solenoidal coil (50) is partially embedded in a deep well etched into the chip substrate (10). The non-embedded part (30) of the coil is fabricated as part of BEOL metallization layers (52). This allows for large cross-sectional area of the solenoid turns, tus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The farbication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric (14) followed by fabrication of the part of the coil (22) that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric (24 and 28) and planarization of the same by CMP. After planarization the fabrication of the remaining part (30) of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil, part of it may be built by electrodeposition through a mask on top of the BEOL layers.

Abstract translation: 提供了用于制造集成在半导体芯片中的螺线管电感器的装置。 螺线管线圈（50）部分地嵌入深蚀刻到芯片衬底（10）中的深井中。 线圈的非嵌入部分（30）被制造为BEOL金属化层（52）的一部分。 这允许电磁线圈的大横截面积，从而减小了匝间电容耦合。 由于本发明的螺线管线圈具有大直径横截面，因此线圈可以制成具有大电感值并且占用芯片的小面积。 在所有FEOL步骤完成之后，远程处理包括蚀刻衬底中的深腔; 用电介质（14）为所述空腔加衬里，随后制造将通过掩模沉积导电材料金属而嵌入的线圈（22）部分; 电介质（24和28）的沉积以及通过CMP对其进行平坦化。 在平面化之后，螺线管线圈的剩余部分（30）的制造被制造为BEOL中的金属化的一部分（即，BEOL的线路/通孔）。 为了进一步增加螺线管线圈的横截面，可以通过BEOL层上面的掩模通过电沉积来建立其一部分。

公开(公告)号：EP1756862A4

公开(公告)日：2011-03-02

申请号：EP05741890

申请日：2005-04-28

Applicant: IBM

Inventor： CHINTHAKINDI ANIL K ,  GROVES ROBERT A ,  TRETIAKOV YOURI V ,  VAED KUNAL ,  VOLANT RICHARD P

IPC: H01L23/522 ,  H01L21/4763 ,  H01L21/768 ,  H01L23/532 ,  H01P11/00

CPC classification number: H01P11/003 ,  H01L21/7682 ,  H01L21/76838 ,  H01L23/5222 ,  H01L23/5225 ,  H01L23/53238 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01L2924/1903 ,  H01L2924/3011 ,  H01L2924/00

公开(公告)号：EP1602113A4

公开(公告)日：2010-12-29

申请号：EP03781593

申请日：2003-10-28

Applicant: IBM

Inventor： VOLANT RICHARD P ,  FLORKEY JOHN E ,  GROVES ROBERT A

IPC: B81B3/00 ,  H01F7/06 ,  H01F7/14 ,  H01H59/00 ,  H03K17/965 ,  H01F21/04

CPC classification number: H03K17/965 ,  H01F7/066 ,  H01F7/14 ,  H01F2007/068 ,  H01H59/0009

公开(公告)号：EP1979932A4

公开(公告)日：2012-03-14

申请号：EP07710130

申请日：2007-01-15

Applicant: IBM

Inventor： ERTURK METE ,  GROVES ROBERT A ,  JOHNSON JEFFREY B ,  JOSEPH ALVIN J ,  LIU QIZHI ,  SPROGIS EDMUND J ,  STAMPER ANTHONY K

IPC: H01L21/77 ,  H01L21/302 ,  H01L21/306 ,  H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

公开(公告)号：EP1461828A4

公开(公告)日：2005-09-28

申请号：EP02803310

申请日：2002-11-07

Applicant: IBM

Inventor： VOLANT RICHARD P ,  BISSON JOHN C ,  COTE DONNA R ,  DALTON TIMOTHY J ,  GROVES ROBERT A ,  PETRARCA KEVIN S ,  STEIN KENNETH J ,  SUBBANNA SESHADRI

IPC: B81B3/00 ,  B81C1/00 ,  H01H49/00 ,  H01H59/00

CPC classification number: B81C1/00246 ,  B81B2201/016 ,  B81B2201/018 ,  B81B2203/0127 ,  B81B2207/07 ,  B81C1/00611 ,  B81C2201/0122 ,  B81C2203/0735 ,  H01G5/40 ,  H01H59/0009

Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.