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10 条记录 (耗时 0.012 秒)

    OPEN CAVITY PHOTONIC INTEGRATED CIRCUIT AND METHOD
    1.
    发明公开
    OPEN CAVITY PHOTONIC INTEGRATED CIRCUIT AND METHOD 审中-公开

    公开(公告)号：EP4198591A1

    公开(公告)日：2023-06-21

    申请号：EP22206581.5

    申请日：2022-11-10

    申请人： INTEL Corporation

    发明人： KARHADE, Omkar ,  CHIU, Chia-Pin ,  ROGERS, Finian ,  LI, Xiaoqian ,  HOSSEINI, Kaveh

    IPC分类号： G02B6/42

    摘要： An electronic device and associated methods are disclosed. In one example, the electronic device includes a laser package. In selected examples, the laser package can include a substrate having a substrate front surface and defining a cavity that extends into the substrate front surface. The laser package can further include a photonic integrated circuit (PIC) attached to the substrate within the cavity at a first surface of the PIC, and laser circuitry communicably coupled to a second surface of the PIC opposite the first surface.

    METHOD TO COUPLE LIGHT USING INTEGRATED HEAT SPREADER
    2.
    发明公开
    METHOD TO COUPLE LIGHT USING INTEGRATED HEAT SPREADER 审中-公开

    公开(公告)号：EP4057038A1

    公开(公告)日：2022-09-14

    申请号：EP22155383.7

    申请日：2022-02-07

    申请人： INTEL Corporation

    发明人： PRATAP, Divya ,  LI, Xiaoqian ,  CHIU, Chia-Pin

    IPC分类号： G02B6/42

    摘要： Embodiments disclosed herein include photonics systems and packages (100). In an embodiment, a photonics package (100) comprises a package substrate (105) and a photonics die (110) overhanging an edge of the package substrate (105). In an embodiment, the photonics die (110) comprises a v-groove (112) for receiving an optical fiber. In an embodiment, the photonics package (100) further comprises an integrated heat spreader (IHS) over the photonics die (110). In an embodiment, the IHS comprises a foot (122), and a hole (123) through the foot (122) is aligned with the v-groove (112).

    PACKAGE SYSTEM AND PACKAGE
    3.
    发明公开
    PACKAGE SYSTEM AND PACKAGE 审中-公开

    公开(公告)号：EP4020711A1

    公开(公告)日：2022-06-29

    申请号：EP21195238.7

    申请日：2021-09-07

    申请人： INTEL Corporation

    发明人： ACIKALIN, Tolga ,  FOUST, Kenneth ,  CHIU, Chia-Pin ,  YANG, Tae-Young ,  ZHOU, Zhen ,  LIU, Renzhi ,  ESCOBAR PELAEZ, Johanny ,  CHIN, Cheng-Yuan

    IPC分类号： H01Q15/00 ,  H01Q15/14 ,  H01Q1/22 ,  H01L23/552 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L25/03

    摘要： In various aspects, a package system includes at least a first package and a second package arranged on a same side of the package carrier. Each of the first package and the second package comprises an antenna to transmit and/or receive radio frequency signals. A cover may be arranged at a distance over the first package and the second package at the same side of the package carrier as the first package and the second package. The cover comprises at least one conductive element forming a predefined pattern on a side of the cover facing the first package and the second package. The predefined pattern is configured as a frequency selective surface. The package system further includes a radio frequency signal interface wirelessly connecting the antennas of the first package and the second package. The radio frequency signal interface comprises the at least one conductive element.

    TEC-EMBEDDED DUMMY DIE TO COOL THE BOTTOM DIE EDGE HOTSPOT
    4.
    发明公开
    TEC-EMBEDDED DUMMY DIE TO COOL THE BOTTOM DIE EDGE HOTSPOT 审中-公开

    公开(公告)号：EP4020546A1

    公开(公告)日：2022-06-29

    申请号：EP21194501.9

    申请日：2021-09-02

    申请人： INTEL Corporation

    发明人： CHIU, Chia-Pin ,  WAN, Zhimin ,  LI, Peng ,  GOYAL, Deepak

    IPC分类号： H01L23/38 ,  H01L35/32

    摘要： Embodiments disclosed herein include thermoelectric cooling (TEC) dies for multichip packages. In an embodiment, a TEC die comprises a glass substrate and an array of N-type semiconductor vias and P-type semiconductor vias through the glass substrate. In an embodiment, conductive traces are over the glass substrate, and individual ones of the conductive traces connect an individual one of the N-type semiconductor vias to an individual one of the P-type semiconductor vias.

    COMPLETELY ENCAPSULATED OPTICAL MULTI CHIP PACKAGE
    8.
    发明公开
    COMPLETELY ENCAPSULATED OPTICAL MULTI CHIP PACKAGE 审中-公开

    公开(公告)号：EP4016148A1

    公开(公告)日：2022-06-22

    申请号：EP21195423.5

    申请日：2021-09-08

    申请人： INTEL Corporation

    发明人： TODA, Asako ,  CHIU, Chia-Pin ,  LI, Xiaoqian ,  BAI, Yiqun

    IPC分类号： G02B6/42

    摘要： Embodiments disclosed herein include optical packages. In an embodiment, an optical package comprises a package substrate, where the package substrate comprises a recessed edge. In an embodiment, a compute die is on the package substrate, and an optics die on the package substrate and overhanging the recessed edge of the package substrate. In an embodiment, an integrated heat spreader (IHS) is over the compute die and the optics die. In an embodiment, a lid covers the recess in the package substrate

    NOVEL PACKAGE DESIGNS TO ENABLE DUAL-SIDED COOLING ON A LASER CHIP
    9.
    发明公开
    NOVEL PACKAGE DESIGNS TO ENABLE DUAL-SIDED COOLING ON A LASER CHIP 审中-公开

    公开(公告)号：EP3989375A1

    公开(公告)日：2022-04-27

    申请号：EP21187340.1

    申请日：2021-07-23

    申请人： INTEL Corporation

    发明人： CHIU, Chia-Pin

    IPC分类号： H01S5/02345 ,  H01S5/0237 ,  H01S5/024 ,  H01S5/02335 ,  H01S5/02315 ,  H01S5/042

    摘要： Embodiments disclosed herein include dual sided cooling architectures for laser packages. In an embodiment, an electronic package comprises a package substrate, and a laser chip attached to the package substrate. In an embodiment, the laser chip has a first surface and a second surface opposite from the first surface. In an embodiment, an interposer is disposed over the laser chip, where the interposer overhangs an edge of the laser chip. In an embodiment, the electronic package further comprises an interconnect between the interposer and the package substrate.