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公开(公告)号：EP2738794B1
公开(公告)日：2018-09-12
申请号：EP12818068.4
申请日：2012-07-27
发明人： TANIMOTO, Satoshi , ZUSHI, Yusuke , MURAKAMI, Yoshinori , ISEKI, Takashi , TAKAMORI, Masato , MATSUI, Kohei
CPC分类号： H01L29/1602 , B23K1/0016 , B23K1/008 , B23K1/19 , B23K1/206 , B23K35/007 , B23K35/025 , B23K35/282 , B23K35/286 , B23K2101/34 , B23K2101/40 , B23K2101/42 , C22C18/04 , H01L24/29 , H01L24/32 , H01L24/83 , H01L29/1608 , H01L29/2003 , H01L2224/29118 , H01L2224/32225 , H01L2224/83001 , H01L2224/83203 , H01L2224/83447 , H01L2224/83815 , H01L2924/01322 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/15747 , H01L2924/15787 , H01L2924/01013 , H01L2924/0103 , H01L2924/00
摘要： A method for manufacturing a semiconductor device comprising: a step for readying each of a semiconductor element (1), a substrate (2) having Cu as a principal element at least on a surface, and a ZnAl solder chip (3') having a smaller shape than that of the semiconductor element; a step for disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; a step for increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load (31) to the ZnAl solder chip, causing the ZnAl solder chip to melt, and forming a ZnAl solder layer (3); and a step for reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer.
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公开(公告)号：EP2712085B1
公开(公告)日：2016-02-03
申请号：EP12781783.1
申请日：2012-05-11
IPC分类号： H01L29/12 , H01L29/78 , H02M1/08 , H03K17/687 , H03K17/695 , H03K17/0412
CPC分类号： H01L27/0629 , H01L27/0682 , H01L2224/48091 , H01L2224/48137 , H01L2224/49111 , H01L2924/19105 , H02M1/08 , H03K17/04123 , H03K17/166 , H01L2924/00014
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3.发明公开Au BASED SOLDER DIE ATTACHMENT SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开VERFAHREN ZUR HERSTELLUNG DAVON的AU-BASIERTELÖTCHIPBEFESTIGUNGS-HALBLEITERBAUELEMENT
公开(公告)号：EP2922087A1
公开(公告)日：2015-09-23
申请号：EP13855530.5
申请日：2013-11-13
IPC分类号： H01L21/52
CPC分类号： H01L23/49513 , H01L21/4853 , H01L23/3735 , H01L23/4827 , H01L23/488 , H01L23/492 , H01L23/49548 , H01L23/49562 , H01L23/49582 , H01L24/03 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/75 , H01L24/83 , H01L2224/0345 , H01L2224/04026 , H01L2224/05082 , H01L2224/05155 , H01L2224/05166 , H01L2224/05639 , H01L2224/2732 , H01L2224/291 , H01L2224/29144 , H01L2224/32059 , H01L2224/3207 , H01L2224/32225 , H01L2224/32245 , H01L2224/32505 , H01L2224/7501 , H01L2224/75102 , H01L2224/75251 , H01L2224/75756 , H01L2224/83011 , H01L2224/83022 , H01L2224/83048 , H01L2224/83075 , H01L2224/8309 , H01L2224/83101 , H01L2224/8321 , H01L2224/83385 , H01L2224/83439 , H01L2224/83444 , H01L2224/83447 , H01L2224/83455 , H01L2224/83457 , H01L2224/83815 , H01L2924/01322 , H01L2924/12042 , H01L2924/15747 , H01L2924/15787 , H01L2924/35121 , H01L2924/3651 , H01L2924/01032 , H01L2924/01014 , H01L2924/0105 , H01L2924/014 , H01L2924/00014 , H01L2924/01027 , H01L2924/01015 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device according to the present invention, having an Au-based solder layer (3) sandwiched between a semiconductor element (1) and a Cu substrate (2) made mainly of Cu, in which the semiconductor device includes: a dense metal film (23) which is arranged between the Cu substrate (2) and the Au-based solder layer (3), and has fine slits (24) patterned to have a predetermined shape in a plan view; and fine structures (4) with dumbbell-like cross section, which have Cu and Au as main elements, and are each buried in the Cu substrate (2), the Au-based solder layer (3), and the fine slits (24) of the dense metal film (23).
摘要翻译： 根据本发明的半导体器件，其具有夹在半导体元件（1）和主要由Cu制成的Cu衬底（2）之间的Au系焊料层（3），其中半导体器件包括致密的金属膜 （23），其布置在所述Cu基板（2）和所述Au基焊料层（3）之间，并且具有图案化以在平面图中具有预定形状的细缝隙（24） 和具有哑铃状横截面的精细结构（4），其具有Cu和Au作为主要元素，并且各自埋入Cu基底（2），Au基焊料层（3）和细缝隙（24） ）的致密金属膜（23）。
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公开(公告)号：EP2750184B1
公开(公告)日：2020-10-07
申请号：EP12825114.7
申请日：2012-08-24
IPC分类号： H01L23/36 , H01L23/373 , H01L25/18 , H01L25/07 , H01L23/498
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公开(公告)号：EP2750184A1
公开(公告)日：2014-07-02
申请号：EP12825114.7
申请日：2012-08-24
摘要： A semiconductor module has a pair of semiconductor devices 16, 18 that are connected in series with each other and have first terminals 12, 14 electrically connected to a first power system BT and a second terminal 13 electrically connected to a second power system M, a heat sink 7, a first electrode 10 that is electrically connected both to the first terminal 12, that is one of the first terminals, and to one of electrodes of the semiconductor device 16, that is one of the pair of semiconductor devices, an output electrode 11 that is electrically connected both to the second terminal 13 and to one of electrodes of the semiconductor device 18, that is the other one of the pair of semiconductor devices, and a second electrode 9 that is electrically connected to the first terminal 14, that is the other one of the first terminals. The second electrode 9 is connected to the heat sink 7 via a first insulating member 8a, and the output electrode 11 is connected to the second electrode 9 via a second insulating member 8b.
摘要翻译： 半导体模块具有彼此串联连接的一对半导体器件16,18，并且具有电连接到第一电力系统BT的第一端子12,14和与第二电力系统M电连接的第二端子13， 散热器7，与作为第一端子之一的第一端子12电连接的第一电极10以及作为一对半导体器件中的一个的半导体器件16的一个电极，输出 电连接到第二端子13和半导体器件18的电极之一的电极11，半导体器件18的一个半导体器件中的另一个以及与第一端子14电连接的第二电极9， 那是第一个终端的另一个。 第二电极9经由第一绝缘构件8a与散热器7连接，输出电极11经由第二绝缘构件8b与第二电极9连接。
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公开(公告)号：EP2712085A1
公开(公告)日：2014-03-26
申请号：EP12781783.1
申请日：2012-05-11
IPC分类号： H03K17/16 , H01L29/12 , H01L29/78 , H02M1/08 , H03K17/687 , H03K17/695
CPC分类号： H01L27/0629 , H01L27/0682 , H01L2224/48091 , H01L2224/48137 , H01L2224/49111 , H01L2924/19105 , H02M1/08 , H03K17/04123 , H03K17/166 , H01L2924/00014
摘要： A switching circuit includes: a first switching element (Q1); a resistor (11) inserted between a control electrode (G) of the first switching element (Q1) and a control circuit (13) which performs switching control on the first switching element (Q1); and a first capacitor (15) and a second switching element (14) connected between the control electrode (G) of the first switching element (Q1) and a low potential-side electrode (S) of the first switching element (Q1). A high potential-side electrode of the second switching element (14) is connected to the control electrode (G) of the first switching element (Q1). A low potential-side electrode of the second switching element (14) is connected to one electrode of the first capacitor (15). The other electrode of the first capacitor (15) is connected to the low potential-side electrode (S) of the first switching element (Q1). A control electrode of the second switching element (14) is connected to an electrode of the resistor (11) connected to the control circuit (13).
摘要翻译： 开关电路包括：第一开关元件（Q1）; 插入在第一开关元件（Q1）的控制电极（G）和对第一开关元件（Q1）进行开关控制的控制电路（13）之间的电阻器（11）; 以及连接在第一开关元件（Q1）的控制电极（G）和第一开关元件（Q1）的低电位侧电极（S）之间的第一电容器（15）和第二开关元件（14）。 第二开关元件（14）的高电位侧电极连接到第一开关元件（Q1）的控制电极（G）。 第二开关元件（14）的低电位侧电极连接到第一电容器（15）的一个电极。 第一电容器（15）的另一个电极连接到第一开关元件（Q1）的低电位侧电极（S）。 第二开关元件（14）的控制电极连接到与控制电路（13）连接的电阻器（11）的电极。
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7.发明公开METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE 审中-公开VERFAHREN ZUR HERSTELLUNG EINES HALBLEITERBAUMMENTS UND HALBLEITERBAUELEMENT
公开(公告)号：EP2738794A1
公开(公告)日：2014-06-04
申请号：EP12818068.4
申请日：2012-07-27
申请人： Nissan Motor Company, Limited , Sumitomo Metal Mining Co., Ltd. , Fuji Electric Co., Ltd. , Fuji Electric Co., Ltd.
发明人： TANIMOTO, Satoshi , ZUSHI, Yusuke , MURAKAMI, Yoshinori , ISEKI, Takashi , TAKAMORI, Masato , SATO, Shinji , MATSUI, Kohei
CPC分类号： H01L29/1602 , B23K1/0016 , B23K1/008 , B23K1/19 , B23K1/206 , B23K35/007 , B23K35/025 , B23K35/282 , B23K35/286 , B23K2101/34 , B23K2101/40 , B23K2101/42 , C22C18/04 , H01L24/29 , H01L24/32 , H01L24/83 , H01L29/1608 , H01L29/2003 , H01L2224/29118 , H01L2224/32225 , H01L2224/83001 , H01L2224/83203 , H01L2224/83447 , H01L2224/83815 , H01L2924/01322 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/15747 , H01L2924/15787 , H01L2924/01013 , H01L2924/0103 , H01L2924/00
摘要： A method for manufacturing a semiconductor device comprising: a step for readying each of a semiconductor element (1), a substrate (2) having Cu as a principal element at least on a surface, and a ZnAl solder chip (3') having a smaller shape than that of the semiconductor element; a step for disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; a step for increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load (31) to the ZnAl solder chip, causing the ZnAl solder chip to melt, and forming a ZnAl solder layer (3); and a step for reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer.
摘要翻译： 一种半导体器件的制造方法，其特征在于，包括以下工序：将至少在表面上具有Cu作为主要元素的半导体元件（1），基板（2）以及ZnAl焊料芯片（3'）， 比半导体元件小的形状; 用于将所述半导体元件和所述基板设置为使得各个接合面彼此面对并将所述ZnAl共晶焊料芯片夹在所述基板和所述半导体元件之间的步骤; 在向ZnAl焊料芯片施加负载（31）的同时，夹持在基板和半导体元件之间的ZnAl焊料芯片的温度升高的步骤，使ZnAl焊料芯片熔化，形成ZnAl焊料层（3）。 以及在向ZnAl焊料层施加负载的同时降低ZnAl焊料层的温度的步骤。
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8.发明公开SEMICONDUCTOR DEVICE FABRICATION METHOD, THERMALLY INSULATED LOAD JIG, AND THERMALLY INSULATED LOAD JIG MOUNTING METHOD 审中-公开法半导体元件，隔热LOAD SPAN设备及其安装方法隔热LOAD JIG
公开(公告)号：EP2843692A1
公开(公告)日：2015-03-04
申请号：EP13782144.3
申请日：2013-04-24
发明人： TANIMOTO, Satoshi , ZUSHI, Yusuke , MURAKAMI, Yoshinori , MATSUI, Kohei , SATO, Shinji , FUKUSHIMA, Yu
CPC分类号： H01L24/83 , B23K37/0426 , H01L24/05 , H01L24/29 , H01L24/75 , H01L24/97 , H01L2224/04026 , H01L2224/05082 , H01L2224/05155 , H01L2224/05166 , H01L2224/05639 , H01L2224/2732 , H01L2224/291 , H01L2224/29118 , H01L2224/29144 , H01L2224/75101 , H01L2224/75305 , H01L2224/7531 , H01L2224/75314 , H01L2224/75315 , H01L2224/75317 , H01L2224/7532 , H01L2224/75756 , H01L2224/7598 , H01L2224/75981 , H01L2224/83022 , H01L2224/83048 , H01L2224/83075 , H01L2224/83101 , H01L2224/832 , H01L2224/83211 , H01L2224/83444 , H01L2224/83447 , H01L2224/83801 , H01L2224/83815 , H01L2224/97 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/1037 , H01L2924/1067 , H01L2924/12032 , H01L2924/12036 , H01L2924/13062 , H01L2924/13091 , H01L2924/15724 , H01L2924/15747 , H01L2924/15787 , H01L2924/3656 , H05K3/34 , H05K3/3431 , H05K13/0465 , H05K2203/0195 , H05K2203/0278 , H01L2924/00 , H01L2924/0542 , H01L2924/0103 , H01L2924/00014 , H01L2924/01042 , H01L2924/01032 , H01L2924/01014 , H01L2924/01013 , H01L2224/05655 , H01L2224/83 , H01L2924/00012
摘要： In a heat insulating load jig 11 of the present invention, a solder material 14 having a melting point or a solidus temperature in a range between a thermal resistance temperature of a semiconductor chip 13 and a temperature 100°C below the thermal resistance temperature is interposed between a circuit board 12 and the semiconductor chip 13; a heat insulating body 17 is placed on an upper side of the semiconductor chip 13 in this state; a metal weight 16 is disposed on the heat insulating body 17; and load is applied to the semiconductor chip 13 while the solder material 14 is melted and solidified.
摘要翻译： 在本发明中，具有在半导体芯片13的热电阻温度和温度100℃以下的热电阻温度之间的范围内的熔点或固相线温度的焊料材料14的热绝缘负荷夹具11夹 一电路板12和半导体芯片13之间; 隔热体17在这种状态下，半导体芯片13的上侧被置于; 金属重物16设置在绝热体17; 并且在焊接材料14被熔融固化负载被施加到半导体芯片13。
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公开(公告)号：EP3771087A1
公开(公告)日：2021-01-27
申请号：EP20176404.0
申请日：2020-05-26
发明人： MATSUI, Kohei
摘要： In a power conversion device (100, 200, 300, 400, 500, 600, 700), a distance (L1, L301) between an output terminal (21c, 321c, 421c, 521c) of a first switching module (21, 321, 421, 521, 721) and a cathode terminal (31b, 331b, 431b, 531b) of a first diode module (31, 331, 431, 531) in a first direction is adapted to be equal to a distance (L2, L302) between an output terminal (22c, 322c, 422c, 522c) of a second switching module (22, 322, 422, 522, 722) and an anode terminal (32a, 332a, 432a, 532a) of a second diode module (32, 332, 432, 532) in the first direction.
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