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公开(公告)号:JP5684511B2
公开(公告)日:2015-03-11
申请号:JP2010180129
申请日:2010-08-11
Applicant: 三菱樹脂株式会社
CPC classification number: B32B15/08 , B32B5/00 , G02B5/0808 , G02B5/085 , H01L33/60 , H01L33/62 , H01L33/64 , H01L2224/48227 , H01L2924/12044 , H05K1/0373 , H05K3/0061 , H05K3/022 , H05K3/389 , H05K2201/0162 , H05K2201/0209 , Y10T428/266 , Y10T428/31663 , Y10T428/31678 , H01L2924/00
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公开(公告)号:JP4181778B2
公开(公告)日:2008-11-19
申请号:JP2002028235
申请日:2002-02-05
IPC: C08J5/18 , H05K3/20 , C08L71/10 , C08L79/08 , H01L23/12 , H01L23/14 , H05K1/03 , H05K1/09 , H05K3/04 , H05K3/10 , H05K3/22 , H05K3/40 , H05K3/46
CPC classification number: H05K3/4632 , H01L2224/16 , H01L2224/83192 , H01L2924/01019 , H01L2924/0102 , H01L2924/01046 , H01L2924/01078 , H01L2924/09701 , H05K1/0353 , H05K1/0373 , H05K1/095 , H05K3/041 , H05K3/045 , H05K3/107 , H05K3/1258 , H05K3/4069 , H05K3/4617 , H05K2201/0129 , H05K2201/0154 , H05K2201/0209 , H05K2201/0352 , H05K2201/0391 , H05K2203/0108 , H05K2203/065 , Y02P20/582 , Y10S428/901 , Y10T29/49117 , Y10T29/49124 , Y10T29/49155 , Y10T29/49158 , Y10T29/49171 , Y10T29/49172 , Y10T428/24917 , Y10T428/249994
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公开(公告)号:JP4137739B2
公开(公告)日:2008-08-20
申请号:JP2003288083
申请日:2003-08-06
Applicant: 三菱樹脂株式会社
CPC classification number: H01L2224/16225 , H01L2224/81
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公开(公告)号:JP4401070B2
公开(公告)日:2010-01-20
申请号:JP2002362558
申请日:2002-12-13
IPC: H01L23/12 , H05K3/22 , H01L21/48 , H01L23/14 , H01L23/498 , H01L23/52 , H01L25/065 , H01L25/07 , H01L25/18 , H05K1/18 , H05K3/04 , H05K3/10 , H05K3/12 , H05K3/46
CPC classification number: H05K3/4632 , H01L21/4857 , H01L23/145 , H01L23/49822 , H01L24/24 , H01L24/82 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H05K1/185 , H05K3/041 , H05K3/107 , H05K3/1258 , H05K3/4617 , H05K2201/0129 , H05K2201/09036 , H05K2203/0108 , Y10S428/901 , Y10T428/24917 , Y10T428/249994 , H01L2924/00
Abstract: The present invention provides a semiconductor device integrated multilayer wiring board with a high degree of heat resistance, which is capable of low temperature fusion without the occurrence of resin flow, enables high precision, finely detailed conductive wiring, thereby enabling the production of high density, ultra small three dimensional mounting modules and the like, can also be ideally applied to low volume high mix manufacturing configurations, and has little impact on the environment, and also provides a method of manufacturing such a semiconductor device integrated multilayer wiring board. In the semiconductor device integrated multilayer wiring board, a wiring substrate is formed by embedding conductive wiring within an insulating substrate, formed from a thermoplastic resin composition comprising a polyarylketone resin with a crystalline melting peak temperature of at least 260° C. and an amorphous polyetherimide resin as primary constituents, so that the surface of the wiring protrudes to the surface of the resin, and a plurality of these wiring substrates are laminated together, IC chips are mounted onto some of the wiring substrates, the insulating substrates of the wiring substrates are bonded together by thermal fusion, and the conductive wiring of each of the wiring substrates, and the wiring electrically connecting the wiring substrates together, is formed from a conductive material produced by curing a conductive paste.
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公开(公告)号:JP5676785B2
公开(公告)日:2015-02-25
申请号:JP2013557536
申请日:2013-02-06
Applicant: 三菱樹脂株式会社
CPC classification number: C09D183/04 , C08K2003/2241 , H01L33/60 , H01L33/62 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H05K3/28 , H05K2201/0209 , H05K2201/2054 , H01L2924/00014 , H01L2924/00
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