摘要:
A bus configuration system includes a plurality of driver integrated circuits (ICs) coupled sequentially on a daisy chain, and a bus controller coupled to the plurality of driver ICs. Each driver IC includes a plurality of ports. The bus controller is used to generate a port definition code for configuring each port of the each driver IC. The bus controller includes a clock output port used to output a clock signal and a data output port used to output a data signal. When a port of the plurality of ports detects the clock signal, the port is configured as a clock input port.
摘要:
An electronic device includes two speakers, a single functional chip, a parameter extraction circuit, an audio processing module, a gain adjusting circuit and a current detecting unit. The current detecting unit is disposed in the functional chip for detecting the driving current of the two speakers. The functional chip provides the driving voltage of the two speakers based on an output signal and converts the analogue current/voltages of the two speakers into digital current/voltages. The parameter extraction circuit acquires the parameter of each speaker based on the digital current/voltages. The audio processing module acquires the gains of various physical quantities based on the parameter of each speaker and determines the final gain of each physical quantity. The gain adjusting circuit provides the output signal by adjusting the gain of an input signal based on the final gain of each physical quantity.
摘要:
A buck converter includes a quick response circuit, a compensator coupled to an output node, an interleaving logic circuit coupled to the compensator, a plurality of on-time generators, a plurality of OR gates coupled to the corresponding on-time generator, a plurality of power stages coupled to the corresponding OR gates, a plurality of inductors and an output capacitor. Each on-time generator is coupled to the interleaving logic circuit, an input node and the output node. The quick response circuit includes a voltage droop sensor coupled to the output node, a load frequency sensor coupled to the output node, a quick response signal generator coupled to the voltage droop sensor, a maximum quick response signal generator coupled to the voltage droop sensor and the load frequency sensor, an AND gate coupled to the quick response signal generator, the maximum quick response signal generator and the plurality of OR gates.
摘要:
A control chip of a driving circuit for driving a LED array shares a ground terminal with the LED array so that, without an additional winding, the driving circuit can provide a supply voltage for the control chip, implement a zero-current switching function, and implement an over-voltage protection function. Since no additional windings are needed, the related costs and the size of the driving circuit are decreased.
摘要:
A voltage converter controller, adapted to a voltage converter circuit, includes a power switch controller and a dead-time determining circuit. The power switch controller receives a PWM signal and outputs a high-side control signal and a low-side control signal accordingly to control the conduction and cut-off of a high-side power switch and a low-side power switch respectively. When the power switch controller starts to control the low-side power switch cut-off, after a first dead-time, the power switch controller starts to control the high-side power switch conducting. The dead-time determining circuit detects a current of the low-side power switch to be larger or smaller than a threshold current when the low-side power switch is conducted, and determines the first dead-time to be a first value or a second value accordingly.
摘要:
A voltage converter controller, adapted to a voltage converter circuit, includes a power switch controller and a dead-time determining circuit. The power switch controller receives a PWM signal and outputs a high-side control signal and a low-side control signal accordingly to control the conduction and cut-off of a high-side power switch and a low-side power switch respectively. When the power switch controller starts to control the low-side power switch cut-off, after a first dead-time, the power switch controller starts to control the high-side power switch conducting. The dead-time determining circuit detects a current of the low-side power switch to be larger or smaller than a threshold current when the low-side power switch is conducted, and determines the first dead-time to be a first value or a second value accordingly.
摘要:
A method for reading/writing a chip in a USB type-C cable comprises converting a read/write command into unstructured vendor defined message (UVDM) that is conforming to a USB power delivery specification. Such UVDM will be delivered to the chip via a type-C configuration channel interface. The chip analyzes the UVDM to acquire the read/write command and reads or modifies the content of a non-volatile memory in the chip according to the read/write command. Due to use of the type-C configuration channel interface, which is inherent in the USB type-C cable, to read/write the chip, it needs no extra interface which otherwise increases costs.
摘要:
A feedback signal stabilized by a capacitor and related to an output voltage of a power converter is used to acquire the output power information of the power converter, and a control circuit uses a second clock not related to the switching frequency of the power converter to count a duration time of the feedback signal being higher than a threshold. When the duration time is higher than a preset time, an abnormal output power of the power converter is distinguished and the power converter will be turned off. The feedback signal will not vary severely even if the output terminal of the power converter is interfered, and the counted duration time will not be influenced when the switching frequency is changing caused by a load changing.
摘要:
A frequency jittering control circuit for a PFM power supply includes a pulse frequency modulator to generate a frequency jittering control signal to switch a power switch to generate an output voltage. The frequency jittering control circuit jitters an input signal or an on-time or off-time of the pulse frequency modulator to jitter the switching frequency of the power switch to thereby improve EMI issue.
摘要:
A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system.