Thermal probe
    1.
    发明授权
    Thermal probe 有权
    热探头

    公开(公告)号:US08595861B2

    公开(公告)日:2013-11-26

    申请号:US13475806

    申请日:2012-05-18

    CPC classification number: G01Q60/58 Y10S977/867

    Abstract: A thermal probe includes a support element, a conductive pattern and a tip. The conductive pattern is disposed at the support element and has plural bending portions. The tip has a base and a pinpoint. The base has a first surface and a second surface which is opposite to the first surface. The pinpoint is disposed at the first surface. The second surface is connected with the conductive pattern. The bending portions are contacted with the first surface. The tip of the thermal probe is replaceable, and the user can choose the optimum combination of the tip, conductive pattern and support element according to their needs.

    Abstract translation: 热探针包括支撑元件,导电图案和尖端。 导电图案设置在支撑元件处并且具有多个弯曲部分。 尖端具有基部和精确点。 底座具有与第一表面相对的第一表面和第二表面。 精确位置设置在第一表面。 第二表面与导电图案连接。 弯曲部分与第一表面接触。 热敏探头的尖端是可更换的,用户可以根据需要选择尖端,导电图案和支撑元件的最佳组合。

    Double patterning strategy for contact hole and trench in photolithography
    2.
    发明授权
    Double patterning strategy for contact hole and trench in photolithography 有权
    光刻中接触孔和沟槽的双重图案化策略

    公开(公告)号:US08450052B2

    公开(公告)日:2013-05-28

    申请号:US13274840

    申请日:2011-10-17

    CPC classification number: H01L21/0271 H01L21/31144

    Abstract: A method of lithography patterning includes forming a first resist pattern on a substrate, the first resist pattern including a plurality of openings therein on the substrate; forming a second resist pattern on the substrate and within the plurality of openings of the first resist pattern, the second resist pattern including at least one opening therein on the substrate; and removing the first resist pattern to uncover the substrate underlying the first resist pattern.

    Abstract translation: 光刻图案的方法包括在基板上形成第一抗蚀剂图案,第一抗蚀剂图案在基板上包括多个开口; 在所述基板上和所述第一抗蚀剂图案的所述多个开口内形成第二抗蚀剂图案,所述第二抗蚀剂图案在所述基板上包括至少一个开口; 以及去除第一抗蚀剂图案以露出第一抗蚀剂图案下方的基板。

    Method of making openings in a layer of a semiconductor device
    3.
    发明授权
    Method of making openings in a layer of a semiconductor device 有权
    在半导体器件的层中制造开口的方法

    公开(公告)号:US07972957B2

    公开(公告)日:2011-07-05

    申请号:US11363860

    申请日:2006-02-27

    Abstract: A method of making a semiconductor device including forming a first sacrificial layer over a first layer to be etched, the first sacrificial layer having a plurality of openings formed therethrough exposing a portion of the first layer; forming a first photoresist layer over the first sacrificial layer and filling the plurality of openings formed through the first sacrificial layer; forming a plurality of openings in the first photoresist layer, each one of the plurality of openings in the first photoresist layer overlying one of the openings in the first sacrificial layer and wherein each opening in the first sacrificial layer has a smaller cross-sectional area then the cross-sectional area of the overlying opening in the first photoresist layer; and etching the first layer through the openings in the first photoresist layer and the first sacrificial layer, comprising exposing the first layer to an etching material.

    Abstract translation: 一种制造半导体器件的方法,包括在待蚀刻的第一层上形成第一牺牲层,所述第一牺牲层具有通过其形成的多个开口,暴露出所述第一层的一部分; 在所述第一牺牲层上形成第一光致抗蚀剂层并填充通过所述第一牺牲层形成的所述多个开口; 在所述第一光致抗蚀剂层中形成多个开口,所述第一光致抗蚀剂层中的所述多个开口中的每一个覆盖所述第一牺牲层中的所述开口之一,并且其中所述第一牺牲层中的每个开口具有较小的横截面积, 第一光致抗蚀剂层中的覆盖开口的横截面积; 以及通过所述第一光致抗蚀剂层和所述第一牺牲层中的所述开口蚀刻所述第一层,包括将所述第一层暴露于蚀刻材料。

    HIGH ETCH RESISTANT MATERIAL FOR DOUBLE PATTERNING
    5.
    发明申请
    HIGH ETCH RESISTANT MATERIAL FOR DOUBLE PATTERNING 有权
    高耐蚀材料双重图案

    公开(公告)号:US20100068656A1

    公开(公告)日:2010-03-18

    申请号:US12210737

    申请日:2008-09-15

    CPC classification number: H01L21/0273 G03F7/0035 G03F7/405 H01L21/3086

    Abstract: The present invention includes a lithography method comprising forming a first patterned insist layer including at least one opening therein over a substrate. A water-soluble polymer layer is formed over the first patterned resist layer and the substrate, whereby a reaction occurs at the interface of the first patterned resist layer and the water-soluble polymer layer. The non-reacted water-soluble polymer layer is removed. Thereafter, a second patterned resist layer is formed over the substrate, wherein at least one portion of the second patterned resist layer is disposed within the at least one opening of the first patterned resist layer or abuts at least one portion of the first patterned resist layer. The substrate is thereafter etched using the first and second patterned resist layers as a mask.

    Abstract translation: 本发明包括光刻方法,包括在衬底上形成包括至少一个开口的第一图案化坚固层。 在第一图案化抗蚀剂层和基底上形成水溶性聚合物层,由此在第一图案化抗蚀剂层和水溶性聚合物层的界面处发生反应。 去除未反应的水溶性聚合物层。 此后,在衬底上形成第二图案化抗蚀剂层,其中第二图案化抗蚀剂层的至少一部分设置在第一图案化抗蚀剂层的至少一个开口内,或者邻接第一图案化抗蚀剂层的至少一部分 。 然后使用第一和第二图案化抗蚀剂层作为掩模蚀刻衬底。

    Via plug formation in dual damascene process
    6.
    发明授权
    Via plug formation in dual damascene process 有权
    通过双镶嵌工艺中的塞子形成

    公开(公告)号:US07452822B2

    公开(公告)日:2008-11-18

    申请号:US11352815

    申请日:2006-02-13

    CPC classification number: H01L21/76808

    Abstract: A method for forming a dual damascene structure in a semiconductor device manufacturing process where via plugs which may include a thickness portion of a plug filling material overlying the process surface is formed by diffusing an acid into a plug filling material layer followed by reacting the acid with the plug filling material layer to form a soluble portion which is then removed using a solvent. A remaining portion of the plug filling material is cured and a BARC layer may be formed over the process surface prior to patterning trenches in an overlying resist layer and forming a dual damascene structure.

    Abstract translation: 一种用于在半导体器件制造工艺中形成双镶嵌结构的方法,其中可以包括覆盖在工艺表面上的塞子填充材料的厚度部分的通孔塞通过将酸扩散到塞填充材料层中,然后使酸与 塞子填充材料层以形成可溶部分,然后使用溶剂除去。 塞子填充材料的剩余部分被固化,并且可以在上覆的抗蚀剂层中的沟槽图案形成双重镶嵌结构之前,在工艺表面上形成BARC层。

    Method of making openings in a layer of a semiconductor device
    8.
    发明申请
    Method of making openings in a layer of a semiconductor device 有权
    在半导体器件的层中制造开口的方法

    公开(公告)号:US20070202690A1

    公开(公告)日:2007-08-30

    申请号:US11363860

    申请日:2006-02-27

    Abstract: A method of making a semiconductor device including forming a first sacrificial layer over a first layer to be etched, the first sacrificial layer having a plurality of openings formed therethrough exposing a portion of the first layer; forming a first photoresist layer over the first sacrificial layer and filling the plurality of openings formed through the first sacrificial layer; forming a plurality of openings in the first photoresist layer, each one of the plurality of openings in the first photoresist layer overlying one of the openings in the first sacrificial layer and wherein each opening in the first sacrificial layer has a smaller cross-sectional area then the cross-sectional area of the overlying opening in the first photoresist layer; and etching the first layer through the openings in the first photoresist layer and the first sacrificial layer, comprising exposing the first layer to an etching material

    Abstract translation: 一种制造半导体器件的方法,包括在待蚀刻的第一层上形成第一牺牲层,所述第一牺牲层具有通过其形成的多个开口,暴露出所述第一层的一部分; 在所述第一牺牲层上形成第一光致抗蚀剂层并填充通过所述第一牺牲层形成的所述多个开口; 在所述第一光致抗蚀剂层中形成多个开口,所述第一光致抗蚀剂层中的所述多个开口中的每一个覆盖所述第一牺牲层中的所述开口之一,并且其中所述第一牺牲层中的每个开口具有较小的横截面积, 第一光致抗蚀剂层中的覆盖开口的横截面积; 以及通过所述第一光致抗蚀剂层和所述第一牺牲层中的所述开口蚀刻所述第一层,包括将所述第一层暴露于蚀刻材料

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