公开(公告)号：US07585706B2

公开(公告)日：2009-09-08

申请号：US11898951

申请日：2007-09-18

申请人： Katsunori Nishii ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

发明人： Katsunori Nishii ,  Kaoru Inoue ,  Toshinobu Matsuno ,  Yoshito Ikeda ,  Hiroyuki Masato

IPC分类号： H01L21/336

CPC分类号： H01L29/66863 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7783

摘要： The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.

摘要翻译： 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。

公开(公告)号：US20080038856A1

公开(公告)日：2008-02-14

申请号：US11898951

申请日：2007-09-18

申请人： Katsunori NISHII ,  Kaoru INOUE ,  Toshinobu MATSUNO ,  Yoshito IKEDA ,  Hiroyuki MASATO

发明人： Katsunori NISHII ,  Kaoru INOUE ,  Toshinobu MATSUNO ,  Yoshito IKEDA ,  Hiroyuki MASATO

IPC分类号： H01L21/44 ,  H01L21/02 ,  H01L21/31 ,  H01L21/3205

CPC分类号： H01L29/66863 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7783

摘要： The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.

摘要翻译： 本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。 在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有 沿着栅电极的栅极长度方向的侧边缘的空间。

公开(公告)号：US06852612B2

公开(公告)日：2005-02-08

申请号：US10323637

申请日：2002-12-20

申请人： Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

发明人： Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

IPC分类号： H01L21/285 ,  H01L21/338 ,  H01L23/48 ,  H01L29/20 ,  H01L29/47 ,  H01L29/812 ,  H01L31/00 ,  H01L33/32 ,  H01L33/40 ,  H01L21/28

CPC分类号： H01L29/475 ,  H01L21/28581 ,  H01L29/2003 ,  H01L29/66856 ,  H01L29/66863 ,  H01L29/812 ,  H01L33/32 ,  H01L33/40

摘要： The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.

摘要翻译： 本发明的半导体器件包括：氮化镓（GaN）化合物半导体层; 和形成在GaN化合物半导体层上的肖特基电极，其中肖特基电极含有硅。

公开(公告)号：US06809352B2

公开(公告)日：2004-10-26

申请号：US10329675

申请日：2002-12-27

申请人： Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

发明人： Katsunori Nishii ,  Yoshito Ikeda ,  Hiroyuki Masato ,  Kaoru Inoue

IPC分类号： H01L310328

CPC分类号： H01L29/475 ,  H01L21/28581 ,  H01L29/2003 ,  H01L29/66856 ,  H01L29/66863 ,  H01L29/812 ,  H01L33/32 ,  H01L33/40

摘要： The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.

摘要翻译： 本发明的半导体器件包括：氮化镓（GaN）化合物半导体层; 和形成在GaN化合物半导体层上的肖特基电极，其中肖特基电极含有硅。

公开(公告)号：US06770922B2

公开(公告)日：2004-08-03

申请号：US10372979

申请日：2003-02-26

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L2976

CPC分类号： H01L29/513 ,  H01L21/28264 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

摘要： A semiconductor device has a first semiconductor layer composed of a group III-V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III-V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.

摘要翻译： 半导体器件具有由III-V族氮化物构成的第一半导体层，通过氧化由位于第一半导体层的栅电极形成区域上的III-V族氮化物构成的第二半导体层而形成的氧化膜， 在氧化膜上形成的绝缘膜具有与氧化膜的组成不同的组成，以及形成在绝缘膜上的栅电极。

公开(公告)号：US06531718B2

公开(公告)日：2003-03-11

申请号：US09759401

申请日：2001-01-12

申请人： Kaoru Inoue ,  Katsunori Nishii ,  Hiroyuki Masato

发明人： Kaoru Inoue ,  Katsunori Nishii ,  Hiroyuki Masato

IPC分类号： H01L2906

CPC分类号： H01L29/205 ,  H01L29/2003 ,  H01L29/7783

摘要： A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein surfaces of the buffer layer are c facets of Ga atoms; a separating layer including (InXAl1-X)YGa1-YN (where 0≦X≦1, 0≦Y≦1) formed on the buffer layer, wherein surfaces of the separating layer are c facets of In, Al, or Ga atoms; a channel layer including GaN, InGaN, or a combination of GaN and InGaN formed on the separating layer, wherein surfaces of the channel layer are c facets of Ga or In atoms; and an electron supply layer including AlGaN formed on the channel layer, wherein surfaces of the electron supply layer are c facets of Al or Ga atoms, wherein the AlN composition ratio in the separating layer is smaller than the AlN composition ratio in the electron supply layer.

摘要翻译： 半导体器件包括：衬底; 包括在衬底上形成的GaN的缓冲层，其中缓冲层的表面是Ga原子的c个面; 形成在缓冲层上的（InXAl1-X）YGa1-YN（其中0 <= X <= 1,0 <= Y <= 1）的分离层，其中分离层的表面是In，Al， 或Ga原子; 包含GaN，InGaN或在分离层上形成的GaN和InGaN的组合的沟道层，其中沟道层的表面是Ga或In原子的c个面; 以及形成在沟道层上的包含AlGaN的电子供给层，其中电子供给层的表面是Al或Ga原子的c个面，其中分离层中的AlN组成比小于电子供给层中的AlN组成比 。

公开(公告)号：US5942772A

公开(公告)日：1999-08-24

申请号：US44845

申请日：1998-03-20

申请人： Katsunori Nishii ,  Mitsuru Nishitsuji ,  Takahiro Yokoyama ,  Akiyoshi Tamura

发明人： Katsunori Nishii ,  Mitsuru Nishitsuji ,  Takahiro Yokoyama ,  Akiyoshi Tamura

IPC分类号： H01L29/812 ,  H01L21/335 ,  H01L21/338 ,  H01L21/76 ,  H01L29/10 ,  H01L29/778 ,  H01L29/80 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/109 ,  H01L31/074

CPC分类号： H01L29/66446 ,  H01L21/7605 ,  H01L29/1029 ,  H01L29/7783 ,  H01L29/802

摘要： A heterojunction epitaxial layer, including a first semiconductor layer containing Al and having a thickness of 50 nm or less and a second semiconductor layer different in composition from the first semiconductor layer, is formed on a substrate composed of semi-insulating GaAs. A gate electrode is formed on a specified region of the top surface of the heterojunction epitaxial layer. The source/drain formation regions of the heterojunction epitaxial layer are provided with respective high-concentration N-type impurity diffusion regions, on which respective ohmic electrodes are formed.

摘要翻译： 在由半绝缘GaAs构成的衬底上形成异质结外延层，其包含含有Al且厚度为50nm以下的第一半导体层和与第一半导体层的组成不同的第二半导体层。 栅电极形成在异质结外延层的顶表面的特定区域上。 异质结外延层的源极/漏极形成区域设置有各自形成有各自的欧姆电极的高浓度N型杂质扩散区域。

公开(公告)号：US20070194295A1

公开(公告)日：2007-08-23

申请号：US11785799

申请日：2007-04-20

申请人： Katsunori Nishii ,  Yoshito Ikeda ,  Kaoru Inoue

发明人： Katsunori Nishii ,  Yoshito Ikeda ,  Kaoru Inoue

IPC分类号： H01L29/06

CPC分类号： H01L29/66462 ,  H01L29/2003

摘要： An active region formed of a Group III nitride semiconductor is formed on a substrate. Then, an electrode is formed on the active region and a protective insulating film is formed on a part of the active region located in the peripheral portion of the electrode by oxidizing the Group III nitride semiconductor.

摘要翻译： 在基板上形成由III族氮化物半导体形成的有源区。 然后，在有源区上形成电极，通过氧化III族氮化物半导体，在位于电极周边部分的有源区的一部分上形成保护绝缘膜。

公开(公告)号：US07122451B2

公开(公告)日：2006-10-17

申请号：US10785944

申请日：2004-02-26

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L21/26 ,  H01L21/28 ,  H01L21/44

CPC分类号： H01L29/66878 ,  H01L21/28575 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/66462 ,  H01L29/8126

摘要： A semiconductor device has an active region composed of a group III–V nitride semiconductor and ohmic electrodes and a gate electrode each formed on the active region. The active region has an entire surface thereof exposed to a plasma such that a surface potential for electrons therein is lower than in the case where the entire surface is not exposed to the plasma.

摘要翻译： 半导体器件具有由III-V族氮化物半导体和欧姆电极构成的有源区域和分别形成在有源区域上的栅电极。 有源区域的整个表面暴露于等离子体，使得其中的电子的表面电位低于整个表面不暴露于等离子体的情况。

公开(公告)号：US07037817B2

公开(公告)日：2006-05-02

申请号：US10889028

申请日：2004-07-13

申请人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

发明人： Kaoru Inoue ,  Yoshito Ikeda ,  Yutaka Hirose ,  Katsunori Nishii

IPC分类号： H01L21/4763

CPC分类号： H01L29/513 ,  H01L21/28264 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78

摘要： A semiconductor device has a first semiconductor layer composed of a group III–V nitride, an oxide film formed by oxidizing a second semiconductor layer composed of a group III–V nitride to be located on the gate electrode formation region of the first semiconductor layer, an insulating film formed on the oxide film to have a composition different from the composition of the oxide film, and a gate electrode formed on the insulating film.