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    Content recording apparatus in which attribute information is suppressed according to operation mode
    1.
    发明授权
    Content recording apparatus in which attribute information is suppressed according to operation mode 有权
    根据操作模式抑制属性信息的内容记录装置

    公开(公告)号：US08154622B2

    公开(公告)日：2012-04-10

    申请号：US11919878

    申请日：2006-05-01

    申请人： Masayoshi Okamoto

    发明人： Masayoshi Okamoto

    IPC分类号： H04N5/76

    CPC分类号： H04N5/765 ,  G11B27/034 ,  H04N1/00251 ,  H04N1/00912 ,  H04N1/32112 ,  H04N5/772 ,  H04N9/8205 ,  H04N2201/0036 ,  H04N2201/0041 ,  H04N2201/0049

    摘要： A content recording apparatus (10) includes an image sensor (12). When a shutter operation is performed, an image imaged by the image sensor is captured in an SDRAM (26), and the captured image is recorded in a memory card (28). The recorded image is transmitted to a recorder (40) being host equipment through a USB controller (30) when a USB transfer mode is selected, and an imaging transfer mode as a subordinate mode is turned off. That is, the CPU prohibits a capturing operation, and registers all the attribute information of the recorded image in a management table (26t), and the recorder performs an image acquiring operation referring to the management table. When the imaging transfer mode is turned on, the CPU skips registration of all the attribute information to allow a capturing operation. When the image is captured, the CPU registers only the attribute information of the image in the management table and sends an image acquiring request to the recorder.

    摘要翻译： 内容记录装置（10）包括图像传感器（12）。 当执行快门操作时，由SDRAM（26）捕获由图像传感器成像的图像，并将捕获的图像记录在存储卡（28）中。 当选择USB传送模式时，记录的图像通过USB控制器（30）被传送到作为主机设备的记录器（40），并且作为下级模式的成像传送模式被关闭。 也就是说，CPU禁止捕获操作，并将记录图像的所有属性信息登记在管理表（26t）中，并且记录器参考管理表执行图像获取操作。 当成像传送模式打开时，CPU跳过所有属性信息的注册以允许拍摄操作。 当拍摄图像时，CPU仅在管理表中注册图像的属性信息，并将图像获取请求发送到记录器。

    Electronic camera and method which adjust the size or position of a feature search area of an imaging surface in response to panning or tilting of the imaging surface
    2.
    发明授权
    Electronic camera and method which adjust the size or position of a feature search area of an imaging surface in response to panning or tilting of the imaging surface 失效
    响应于成像表面的平移或倾斜来调整成像表面的特征搜索区域的尺寸或位置的电子照相机和方法

    公开(公告)号：US08031228B2

    公开(公告)日：2011-10-04

    申请号：US11709564

    申请日：2007-02-22

    申请人： Masayoshi Okamoto

    发明人： Masayoshi Okamoto

    IPC分类号： H04N7/15 ,  H04N7/18

    CPC分类号： H04N5/232 ,  H04N5/23219 ,  H04N5/23293

    摘要： An electronic camera includes an image sensor. The image sensor has an imaging surface for capturing an object scene, and repeatedly generates an object scene image. A CPU assigns a search area on the imaging surface, and repeatedly executes search processing for searching a facial image on the search area in parallel with executing object scene image generating processing of the image sensor. A character representative of a position of a facial image detected by the search processing is superposed on a through-image on an LCD monitor. The size of the search area assigned on the imaging surface is reduced as a panning and/or tilting speed of the imaging surface is increased.

    摘要翻译： 电子照相机包括图像传感器。 图像传感器具有用于捕获对象场景的成像面，并且重复地生成对象场景图像。 CPU在成像表面上分配搜索区域，并且与执行图像传感器的对象场景图像生成处理并行地重复执行用于搜索搜索区域上的面部图像的搜索处理。 表示通过搜索处理检测到的面部图像的位置的字符叠加在LCD监视器上的直通图像上。 当成像表面的平移和/或倾斜速度增加时，分配在成像表面上的搜索区域的尺寸减小。

    Outgoing email check system, check data providing apparatus, check data inspecting apparatus, and outgoing email check method
    4.
    发明申请
    Outgoing email check system, check data providing apparatus, check data inspecting apparatus, and outgoing email check method 有权
    外发电子邮件检查系统，检查数据提供装置，检查数据检查装置和外发电子邮件检查方法

    公开(公告)号：US20110067102A1

    公开(公告)日：2011-03-17

    申请号：US12662089

    申请日：2010-03-30

    申请人： Ryota Fukasawa ,  Aya Higashizono ,  Natsu Hashisaka ,  Masayoshi Okamoto ,  Kiyoshi Kurashige ,  Hiroshi Tsuda ,  Yoshinori Katayama ,  Fumihiko Kozakura ,  Shinichi Mochizuki

    发明人： Ryota Fukasawa ,  Aya Higashizono ,  Natsu Hashisaka ,  Masayoshi Okamoto ,  Kiyoshi Kurashige ,  Hiroshi Tsuda ,  Yoshinori Katayama ,  Fumihiko Kozakura ,  Shinichi Mochizuki

    IPC分类号： G06F21/00 ,  G06F15/16

    CPC分类号： G06Q10/107

    摘要： To allow inspecting whether a security check of a planned outgoing email is finished in an outgoing email check system, a check data providing apparatus 2 of an outgoing email check system 100 stores check information distributed from a check information management apparatus 1, appends check data generated based on the check information to a header of a checked planned outgoing email, and transmits the email to an email transmitting apparatus 9. A check data inspecting apparatus 3 stores the check information distributed from the check information management apparatus 1, inspects the check data extracted from the planned outgoing email received from the email transmitting apparatus 9 based on the check information, determines that the transmission is permitted when the check data of the planned outgoing email matches the check information, and determines that the transmission is rejected when the check data does not match the check information. The email transmitting apparatus 9 executes a transmission process only for the planned outgoing email for which the transmission is permitted.

    摘要翻译： 为了检查在外发电子邮件检查系统中是否完成了计划外发电子邮件的安全检查，出站电子邮件检查系统100的检查数据提供装置2存储从检查信息管理装置1分发的检查信息，附加生成的检查数据 基于对所检查的计划外发邮件的标题的检查信息，并将该邮件发送到电子邮件发送装置9.检查数据检查装置3存储从检查信息管理装置1分发的检查信息，检查提取的检查数据 从基于检查信息的从电子邮件发送装置9接收到的计划外发电子邮件，当计​​划的发送电子邮件的检查数据与检查信息一致时，确定允许发送，并且当检查数据确定时，确定发送被拒绝 不符合检查信息。 电子邮件发送装置9仅对允许发送的计划外发电子邮件执行发送处理。

    MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    6.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
    半导体集成电路器件的制造方法

    公开(公告)号：US20090130785A1

    公开(公告)日：2009-05-21

    申请号：US11719112

    申请日：2004-11-18

    申请人： Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Masayoshi Okamoto ,  Yasunori Narizuka

    发明人： Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Masayoshi Okamoto ,  Yasunori Narizuka

    IPC分类号： H01L21/66 ,  G01R31/26

    CPC分类号： G01R1/0735 ,  G01R3/00

    摘要： As the thickness of the card holder for preventing warping of a multilayered wiring substrate 1 is increased, there occurs a problem that a thin film sheet 2 is buried in a card holder and secure contact between probes 7 and test pads cannot be realized. For its prevention, the thin film sheet 2 and a bonding ring 6 are bonded in a state where a tensile force is applied only to the central region IA of the thin film sheet 2, and a tensile force is not applied to an outer peripheral region OA. Then, the height of the bonding ring 6 defining the height up to the probe surface of the thin film sheet 2 is increased, thereby increasing the height up to the probe surface of the thin film sheet 2.

    摘要翻译： 随着用于防止多层布线基板1翘曲的卡夹的厚度增加，存在薄膜片2被埋在卡夹中并且不能实现探针7和测试垫之间的牢固接触的​​问题。 为了防止，薄膜片2和接合环6在仅向薄膜片2的中心区域IA施加张力的状态下接合，并且拉伸力不施加到外围区域 OA。 然后，限定高达薄膜片2的探针表面的高度的接合环6的高度增加，从而增加高达薄膜片2的探针表面的高度。

    Manufacturing method of semiconductor integrated circuit device
    7.
    发明授权
    Manufacturing method of semiconductor integrated circuit device 失效
    半导体集成电路器件的制造方法

    公开(公告)号：US07534629B2

    公开(公告)日：2009-05-19

    申请号：US11448071

    申请日：2006-06-07

    申请人： Teruo Shoji ,  Akio Hasebe ,  Yoshinori Deguchi ,  Motoji Murakami ,  Masayoshi Okamoto ,  Yasunori Narizuka ,  Susumu Kasukabe

    发明人： Teruo Shoji ,  Akio Hasebe ,  Yoshinori Deguchi ,  Motoji Murakami ,  Masayoshi Okamoto ,  Yasunori Narizuka ,  Susumu Kasukabe

    IPC分类号： H01L21/66

    CPC分类号： G01R1/0735

    摘要： By using a membrane probe formed by using a manufacturing technique for semiconductor integrated circuit devices, the yield of probing collectively performed on a plurality of chips is to be enhanced. A probe card is formed by using a plurality of pushers, each pusher being formed of a POGO pin insulator, POGO pins, an FPC connector, a membrane probe HMS, an impact easing sheet, an impact easing plate, a chip condenser YRS and so on, wherein one or two POGO pins press a plurality of metal films arranged like islands. One or more cuts are made into what matches the chip to be tested in the area of the membrane probe in a direction substantially parallel to the extending direction of wiring electrically connected to probes formed in the membrane probe.

    摘要翻译： 通过使用通过使用半导体集成电路器件的制造技术形成的膜探针，将提高在多个芯片上共同执行的探测的产量。 通过使用多个推动器形成探针卡，每个推动器由POGO针绝缘体，POGO针，FPC连接器，膜探针HMS，冲击缓冲片，冲击缓冲板，芯片冷凝器YRS等形成 其中一个或两个POGO销按压布置成岛状的多个金属膜。 将一个或多个切口制成与膜探针区域中基本上平行于电连接到形成在膜探针中的探针的布线的延伸方向的方向匹配的待测芯片。

    Manufacturing method of semiconductor integrated circuit device and probe card
    8.
    发明授权
    Manufacturing method of semiconductor integrated circuit device and probe card 有权
    半导体集成电路器件和探针卡的制造方法

    公开(公告)号：US07517707B2

    公开(公告)日：2009-04-14

    申请号：US11783778

    申请日：2007-04-12

    申请人： Masayoshi Okamoto ,  Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Akira Shimase

    发明人： Masayoshi Okamoto ,  Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Akira Shimase

    IPC分类号： H01L31/26

    CPC分类号： G01R3/00 ,  G01R1/07307

    摘要： Electrical testing is to be performed on a semiconductor integrated circuit device which the test pads formed. To facilitate such testing, the method of manufacture of the semiconductor integrated circuit device employs a probe card which has two or more contact terminals which can contact two or more electrodes. This probe card includes, in opposition to a wiring substrate of the semiconductor integrated circuit device in which a first wiring is formed, a first sheet having two or more contact terminals to contact the two or more electrodes; a second wiring electrically connected to the two or more contact terminals and the first wiring; and first dummy wirings which are near the region of formation of the two or more contact terminals, are arranged to a non-forming region of the second wiring, and do not participate in signal transfer.

    摘要翻译： 电测试将在形成测试焊盘的半导体集成电路器件上进行。 为了便于这种测试，半导体集成电路器件的制造方法采用具有两个或更多个能够接触两个或更多个电极的接触端子的探针卡。 该探针卡与形成有第一布线的半导体集成电路器件的布线基板相对应，具有接触两个以上的电极的两个以上的接触端子的第一片; 电连接到所述两个或更多个接触端子和所述第一布线的第二布线; 并且在两个或多个接触端子的形成区域附近的第一虚拟布线被布置到第二布线的非形成区域，并且不参与信号传递。

    Manufacturing method of semiconductor integrated circuit device and probe card
    9.
    发明申请
    Manufacturing method of semiconductor integrated circuit device and probe card 有权
    半导体集成电路器件和探针卡的制造方法

    公开(公告)号：US20070190671A1

    公开(公告)日：2007-08-16

    申请号：US11783778

    申请日：2007-04-12

    申请人： Masayoshi Okamoto ,  Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Akira Shimase

    发明人： Masayoshi Okamoto ,  Hideyuki Matsumoto ,  Shingo Yorisaki ,  Akio Hasebe ,  Yasuhiro Motoyama ,  Akira Shimase

    IPC分类号： H01L21/66

    CPC分类号： G01R3/00 ,  G01R1/07307

    摘要： Electrical testing is to be performed on a semiconductor integrated circuit device which the test pads formed. To facilitate such testing, the method of manufacture of the semiconductor integrated circuit device employs a probe card which has two or more contact terminals which can contact two or more electrodes. This probe card includes, in opposition to a wiring substrate of the semiconductor integrated circuit device in which a first wiring is formed, a first sheet having two or more contact terminals to contact the two or more electrodes; a second wiring electrically connected to the two or more contact terminals and the first wiring; and first dummy wirings which are near the region of formation of the two or more contact terminals, are arranged to a non-forming region of the second wiring, and do not participate in signal transfer.

    摘要翻译： 电测试将在形成测试焊盘的半导体集成电路器件上进行。 为了便于这种测试，半导体集成电路器件的制造方法采用具有两个或更多个能够接触两个或更多个电极的接触端子的探针卡。 该探针卡与形成有第一布线的半导体集成电路器件的布线基板相对应，具有接触两个以上的电极的两个以上的接触端子的第一片; 电连接到所述两个或更多个接触端子和所述第一布线的第二布线; 并且在两个或多个接触端子的形成区域附近的第一虚拟布线被布置到第二布线的非形成区域，并且不参与信号传递。

    Manufacturing method of semiconductor integrated circuit device
    10.
    发明申请
    Manufacturing method of semiconductor integrated circuit device 有权
    半导体集成电路器件的制造方法

    公开(公告)号：US20060286715A1

    公开(公告)日：2006-12-21

    申请号：US11471712

    申请日：2006-06-21

    申请人： Akio Hasebe ,  Masayoshi Okamoto ,  Yasunori Narizuka ,  Shingo Yorisaki ,  Yasuhiro Motoyama

    发明人： Akio Hasebe ,  Masayoshi Okamoto ,  Yasunori Narizuka ,  Shingo Yorisaki ,  Yasuhiro Motoyama

    IPC分类号： H01L21/00

    CPC分类号： G01R3/00 ,  G01R1/07378 ,  G01R31/2889

    摘要： During probe testing using a prober having probe needles formed by using a manufacturing technology for a semiconductor integrated circuit device, reliable contact is ensured between the probe needles and test pads. A pressing tool having at least one hole portion formed therein and extending therethrough between the main and back surface thereof is prepared. An elastomer in the form of a sheet and a polyimide sheet are successively disposed on the main surface of the pressing tool. With th elastomer and the polyimide sheet being electrostatically attracted to the pressing tool, the pressing tool is disposed on a thin-film sheet such that the main surface thereof faces the back surface (the surface opposite to the main surface thereof formed with the probe) of the thin-film sheet. Then, the thin-film sheet with the pressing tool bonded thereto is attached to a probe card.

    摘要翻译： 在使用具有通过使用用于半导体集成电路器件的制造技术形成的探针的探针的探针测试期间，确保探针和测试垫之间的可靠接触。 制备具有形成在其中并在其主表面和后表面之间延伸穿过其中的至少一个孔部分的按压工具。 在压制工具的主表面上依次设置片状和聚酰亚胺片形式的弹性体。 利用弹性体，将聚酰亚胺片静电吸引到按压工具上，将压制工具设置在薄膜片上，使得其主表面面向背面（与形成有探针的主表面相反的表面） 的薄膜片。 然后，将与其接合的按压工具的薄膜片安装在探针卡上。