公开(公告)号：US20240079231A1

公开(公告)日：2024-03-07

申请号：US18388578

申请日：2023-11-10

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Robert Vyne

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/24 ,  C23C16/455 ,  H01J37/32

CPC classification number: H01L21/02532 ,  C23C16/0245 ,  C23C16/24 ,  C23C16/455 ,  H01J37/32449 ,  H01J37/32899 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01J37/32357 ,  H01J2237/332 ,  H01J2237/334

Abstract: A method for forming a layer on a substrate includes providing a substrate in a reactor of a semiconductor processing system, the reactor having a divider separating an upper chamber from a lower chamber and a substrate holder therein, the substrate having upper and lower surfaces. The wafer is positioned within the reactor using the substrate holder such that the upper surface bounds the upper chamber, a silicon-containing gas is flowed through the upper chamber to deposit a layer of the upper surface, and a halogen-containing gas is flowed through the lower chamber to etch a deposited film on at least one wall bounding the lower chamber while flowing the silicon-containing gas through the upper chamber. Semiconductor processing systems are also described.

公开(公告)号：US11901179B2

公开(公告)日：2024-02-13

申请号：US17509290

申请日：2021-10-25

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Robert Vyne

IPC: H01L21/306 ,  H01L21/02 ,  H01J37/32 ,  C23C16/24 ,  C23C16/455 ,  C23C16/02

CPC classification number: H01L21/02532 ,  C23C16/0245 ,  C23C16/24 ,  C23C16/455 ,  H01J37/32449 ,  H01J37/32899 ,  H01L21/0262 ,  H01L21/02576 ,  H01L21/02579 ,  H01J37/32357 ,  H01J2237/332 ,  H01J2237/334

Abstract: A method for forming a layer on a substrate includes providing a substrate in a reactor of a semiconductor processing system, the reactor having a divider separating an upper chamber from a lower chamber and a substrate holder therein, the substrate having upper and lower surfaces. The wafer is positioned within the reactor using the substrate holder such that the upper surface bounds the upper chamber, a silicon-containing gas is flowed through the upper chamber to deposit a layer of the upper surface, and a halogen-containing gas is flowed through the lower chamber to etch a deposited film on at least one wall bounding the lower chamber while flowing the silicon-containing gas through the upper chamber. Semiconductor processing systems are also described.

公开(公告)号：US10446393B2

公开(公告)日：2019-10-15

申请号：US15957565

申请日：2018-04-19

Applicant: ASM IP Holding B.V.

Inventor： Nupur Bhargava ,  John Tolle ,  Joe Margetis ,  Matthew Goodman ,  Robert Vyne

IPC: H01L21/02 ,  H01L29/66 ,  C30B29/10 ,  C30B25/10 ,  C30B25/02 ,  C30B29/06 ,  C30B29/52

Abstract: A method for forming a silicon-containing epitaxial layer is disclosed. The method may include, heating a substrate to a temperature of less than approximately 950° C. and exposing the substrate to a first silicon source comprising a hydrogenated silicon source, a second silicon source, a dopant source, and a halogen source. The method may also include depositing a silicon-containing epitaxial layer wherein the dopant concentration within the silicon-containing epitaxial layer is greater than 3×1021 atoms per cubic centimeter.

公开(公告)号：US20220130668A1

公开(公告)日：2022-04-28

申请号：US17509290

申请日：2021-10-25

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Robert Vyne

IPC: H01L21/02 ,  H01J37/32 ,  C23C16/24 ,  C23C16/455 ,  C23C16/02

Abstract: A method for forming a layer on a substrate includes providing a substrate in a reactor of a semiconductor processing system, the reactor having a divider separating an upper chamber from a lower chamber and a substrate holder therein, the substrate having upper and lower surfaces. The wafer is positioned within the reactor using the substrate holder such that the upper surface bounds the upper chamber, a silicon-containing gas is flowed through the upper chamber to deposit a layer of the upper surface, and a halogen-containing gas is flowed through the lower chamber to etch a deposited film on at least one wall bounding the lower chamber while flowing the silicon-containing gas through the upper chamber. Semiconductor processing systems are also described.

公开(公告)号：US20180323059A1

公开(公告)日：2018-11-08

申请号：US15957565

申请日：2018-04-19

Applicant: ASM IP Holding B.V.

Inventor： Nupur Bhargava ,  John Tolle ,  Joe Margetis ,  Matthew Goodman ,  Robert Vyne

IPC: H01L21/02 ,  H01L29/66 ,  C30B25/10 ,  C30B29/10

CPC classification number: H01L21/0262 ,  C30B25/02 ,  C30B25/10 ,  C30B29/06 ,  C30B29/10 ,  C30B29/52 ,  H01L21/02532 ,  H01L21/02535 ,  H01L21/02573 ,  H01L21/02576 ,  H01L21/02579 ,  H01L29/66795

Abstract: A method for forming a silicon-containing epitaxial layer is disclosed. The method may include, heating a substrate to a temperature of less than approximately 950° C. and exposing the substrate to a first silicon source comprising a hydrogenated silicon source, a second silicon source, a dopant source, and a halogen source. The method may also include depositing a silicon-containing epitaxial layer wherein the dopant concentration within the silicon-containing epitaxial layer is greater than 3×1021 atoms per cubic centimeter.

公开(公告)号：US20170260649A1

公开(公告)日：2017-09-14

申请号：US15410503

申请日：2017-01-19

Applicant: ASM IP Holding B.V.

Inventor： Stephen Dale Coomer ,  Robert Vyne ,  Timo Bergman ,  Lee Bode ,  Wentao Wang

IPC: C30B25/14 ,  C23C16/455 ,  C30B25/16

CPC classification number: C30B25/14 ,  C23C16/45561 ,  C23C16/45582 ,  C23C16/45587 ,  C30B25/165

Abstract: A gas distribution system is disclosed in order to obtain better film uniformity on a wafer. The better film uniformity may be achieved by utilizing an expansion plenum and a plurality of, for example, proportioning valves to ensure an equalized pressure or flow along each gas line disposed above the wafer.