-
公开(公告)号:US11658218B2
公开(公告)日:2023-05-23
申请号:US17668992
申请日:2022-02-10
发明人: Yongjing Lin , Karla M Bernal Ramos , Shih Chung Chen , Yixiong Yang , Lin Dong , Steven C. H. Hung , Srinivas Gandikota
CPC分类号: H01L29/408 , H01L21/0228 , H01L21/02153 , H01L21/28158 , H01L29/513 , H01L29/517 , H01L29/7851
摘要: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-κ dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).
-
公开(公告)号:US20230010499A1
公开(公告)日:2023-01-12
申请号:US17859777
申请日:2022-07-07
IPC分类号: H01L21/02 , H01L21/28 , H01L21/67 , H01L21/687
摘要: Exemplary integrated cluster tools may include a factory interface including a first transfer robot. The tools may include a wet clean system coupled with the factory interface at a first side of the wet clean system. The tools may include a load lock chamber coupled with the wet clean system at a second side of the wet clean system opposite the first side of the wet clean system. The tools may include a first transfer chamber coupled with the load lock chamber. The first transfer chamber may include a second transfer robot. The tools may include a thermal treatment chamber coupled with the first transfer chamber. The tools may include a second transfer chamber coupled with the first transfer chamber. The second transfer chamber may include a third transfer robot. The tools may include a metal deposition chamber coupled with the second transfer chamber.
-
公开(公告)号:US11552177B2
公开(公告)日:2023-01-10
申请号:US17013161
申请日:2020-09-04
发明人: Srinivas Gandikota , Steven C. H. Hung , Mandyam Sriram , Jacqueline S. Wrench , Yixiong Yang , Yong Yang
IPC分类号: H01L29/49 , H01L29/51 , H01L29/40 , H01L21/28 , H01L21/285
摘要: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiments comprise NbN as a PMOS work function material at a thickness in a range of greater than or equal to 5 Å to less than or equal to 50 Å. The PMOS work function material comprising NbN has an effective work function of greater than or equal to 4.75 eV. Some embodiments comprise HfO2 as a high-κ metal oxide layer. Some embodiments provide improved PMOS bandedge performance evidenced by improved flatband voltage. Some embodiments exclude transition metal niobium nitride materials as work function materials.
-
公开(公告)号:US20210398814A1
公开(公告)日:2021-12-23
申请号:US17348081
申请日:2021-06-15
发明人: Steven C. H. Hung , Benjamin Colombeau , Abhishek Dube , Sheng-Chin Kung , Patricia M. Liu , Malcolm J. Bevan , Johanes F. Swenberg
摘要: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.
-
公开(公告)号:US09437640B2
公开(公告)日:2016-09-06
申请号:US14481038
申请日:2014-09-09
发明人: Sherry Mings , Patricia M. Liu , Steven C. H. Hung
IPC分类号: H01L27/14 , H01L27/146
CPC分类号: H01L27/14643 , H01L27/1462 , H01L27/14621 , H01L27/14625 , H01L27/14627 , H01L27/1464 , H01L27/14689
摘要: Backside illuminated sensors and methods of manufacture are described. Specifically, a backside illuminated sensor with a dipole modulating layer near the photodiode is described.
摘要翻译: 描述背面照明传感器和制造方法。 具体来说,描述了在光电二极管附近具有偶极子调制层的背面照明传感器。
-
公开(公告)号:US11996455B2
公开(公告)日:2024-05-28
申请号:US18130201
申请日:2023-04-03
发明人: Yongjing Lin , Karla M Bernal Ramos , Shih Chung Chen , Yixiong Yang , Lin Dong , Steven C. H. Hung , Srinivas Gandikota
CPC分类号: H01L29/408 , H01L21/02153 , H01L21/0228 , H01L21/28158 , H01L29/513 , H01L29/517 , H01L29/7851
摘要: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-κ dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).
-
公开(公告)号:US11923441B2
公开(公告)日:2024-03-05
申请号:US17888894
申请日:2022-08-16
发明人: Steven C. H. Hung , Benjamin Colombeau , Andy Lo , Byeong Chan Lee , Johanes F. Swenberg , Theresa Kramer Guarini , Malcolm J. Bevan
IPC分类号: H01L29/66 , C23C8/02 , C23C8/16 , C23C8/80 , C23C16/455 , C23C16/56 , C30B29/06 , C30B29/52 , H01L21/02 , H01L29/423
CPC分类号: H01L29/6681 , C23C8/02 , C23C8/16 , C23C8/80 , C23C16/45536 , C23C16/56 , C30B29/06 , C30B29/52 , H01L21/022 , H01L21/02238 , H01L21/02255 , H01L21/0228 , H01L29/42392 , H01L29/6653
摘要: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-κ layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-κ layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.
-
公开(公告)号:US11417517B2
公开(公告)日:2022-08-16
申请号:US16951858
申请日:2020-11-18
摘要: A method of forming a high-K dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-K dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-K dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-K dielectric cap layer, and removing the sacrificial silicon cap layer.
-
公开(公告)号:US11289579B2
公开(公告)日:2022-03-29
申请号:US17034116
申请日:2020-09-28
发明人: Yongjing Lin , Karla M Bernal Ramos , Shih Chung Chen , Yixiong Yang , Lin Dong , Steven C. H. Hung , Srinivas Gandikota
摘要: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-κ dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).
-
公开(公告)号:US11189479B2
公开(公告)日:2021-11-30
申请号:US16865514
申请日:2020-05-04
IPC分类号: H01L21/469 , H01L23/58 , H01L21/02 , H01L21/762 , H01L21/768
摘要: A method of forming an electronic device is disclosed. The method comprises forming a barrier layer on a silicon layer, and depositing a silicon oxide layer on the barrier layer. The formation of the barrier layer on the silicon layer minimizes parasitic oxidation of the underlying silicon layer and minimizes defects in the silicon layer.
-
-
-
-
-
-
-
-
-