公开(公告)号：US20240154018A1

公开(公告)日：2024-05-09

申请号：US18411693

申请日：2024-01-12

Applicant: Applied Materials, Inc.

Inventor： Ria Someshwar ,  Seshadri Ganguli ,  Lan Yu ,  Siddarth Krishnan ,  Srinivas Gandikota ,  Jacqueline S. Wrench ,  Yixiong Yang

IPC: H01L29/45 ,  H01L21/285 ,  H01L21/324 ,  H01L21/8238 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/456 ,  H01L21/28518 ,  H01L21/324 ,  H01L21/823814 ,  H01L29/401 ,  H01L29/45 ,  H01L29/665

Abstract: Methods for forming a semiconductor structure and semiconductor structures are described. The method comprises patterning a substrate to form a first opening and a second opening, the substrate comprising an n transistor and a p transistor, the first opening over the n transistor and the second opening over the p transistor; pre-cleaning the substrate; depositing a titanium silicide (TiSi) layer on the n transistor and on the p transistor by plasma-enhanced chemical vapor deposition (PECVD); optionally depositing a first barrier layer on the titanium silicide (TiSi) layer and selectively removing the first barrier layer from the p transistor; selectively forming a molybdenum silicide (MoSi) layer on the titanium silicide (TiSi) layer on the n transistor and the p transistor; forming a second barrier layer on the molybdenum silicide (MoSi) layer; and annealing the semiconductor structure. The method may be performed in a processing chamber without breaking vacuum.

公开(公告)号：US11869806B2

公开(公告)日：2024-01-09

申请号：US17314515

申请日：2021-05-07

Applicant: Applied Materials, Inc.

Inventor： Seshadri Ganguli ,  Jacqueline S. Wrench ,  Yixiong Yang ,  Yong Yang ,  Srinivas Gandikota

IPC: H01L21/768 ,  H01L21/02

CPC classification number: H01L21/76877 ,  H01L21/02068 ,  H01L21/76831

Abstract: Methods for forming a semiconductor structure are described. The method includes cleaning a substrate to form a substrate surface substantially free of oxide, exposing the substrate surface to a first molybdenum precursor, and exposing the substrate surface to a reactant to selectively deposit a first molybdenum film on the substrate surface. The method may be performed in a processing chamber without breaking vacuum. The method may also include forming one or more of a cap layer and a liner and annealing the substrate. The method may also include depositing a second molybdenum film on the substrate surface.

公开(公告)号：US20230141748A1

公开(公告)日：2023-05-11

申请号：US18149226

申请日：2023-01-03

Applicant: Applied Materials, Inc.

Inventor： Yixiong Yang ,  Jacqueline S. Wrench ,  Yong Yang ,  Srinivas Gandikota ,  Annamalai Lakshmanan ,  Joung Joo Lee ,  Feihu Wang ,  Seshadri Ganguli

IPC: H10B12/00 ,  H01L21/285 ,  C23C16/455 ,  H01L21/02

CPC classification number: H01L27/10891 ,  H01L21/28568 ,  H01L21/28556 ,  H01L21/2855 ,  C23C16/45553 ,  H01L21/02491 ,  H01L21/02631 ,  H01L21/823431

Abstract: Methods for DRAM device with a buried word line are described. The method includes forming a metal cap layer and a molybdenum conductor layer in a feature on a substrate. The method includes depositing the metal cap layer on the substrate by physical vapor deposition (PVD) and depositing the molybdenum conductor layer by atomic layer deposition (ALD) on the metal cap layer.

公开(公告)号：US11552177B2

公开(公告)日：2023-01-10

申请号：US17013161

申请日：2020-09-04

Applicant: Applied Materials, Inc.

Inventor： Srinivas Gandikota ,  Steven C. H. Hung ,  Mandyam Sriram ,  Jacqueline S. Wrench ,  Yixiong Yang ,  Yong Yang

IPC: H01L29/49 ,  H01L29/51 ,  H01L29/40 ,  H01L21/28 ,  H01L21/285

Abstract: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiments comprise NbN as a PMOS work function material at a thickness in a range of greater than or equal to 5 Å to less than or equal to 50 Å. The PMOS work function material comprising NbN has an effective work function of greater than or equal to 4.75 eV. Some embodiments comprise HfO2 as a high-κ metal oxide layer. Some embodiments provide improved PMOS bandedge performance evidenced by improved flatband voltage. Some embodiments exclude transition metal niobium nitride materials as work function materials.

公开(公告)号：US20220359532A1

公开(公告)日：2022-11-10

申请号：US17308577

申请日：2021-05-05

Applicant: Applied Materials, Inc.

Inventor： Yong Yang ,  Kunal Bhatnagar ,  Srinivas Gandikota ,  Seshadri Ganguli ,  Jose Alexandro Romero ,  Mandyam Sriram ,  Mohith Verghese ,  Jacqueline S. Wrench ,  Yixiong Yang

IPC: H01L27/108 ,  C23C16/42 ,  C23C16/455

Abstract: Methods of forming memory devices are described. A molybdenum silicide nucleation layer is formed, and the substrate is soaked in a titanium precursor prior to a bulk molybdenum gap fill process. In other embodiments, a molybdenum silicide film is formed in a first process cycle and a second process cycle is performed where the substrate is exposed to a titanium precursor. In further embodiments, a substrate having at least one feature thereon is exposed to a first titanium precursor and a nitrogen-containing reactant. The substrate is then soaked in a second titanium precursor, and then is exposed to a first molybdenum precursor followed by exposure to a silane to form a molybdenum silicide layer on a surface of the substrate.

公开(公告)号：US20220359281A1

公开(公告)日：2022-11-10

申请号：US17314515

申请日：2021-05-07

Applicant: Applied Materials, Inc.

Inventor： Seshadri Ganguli ,  Jacqueline S. Wrench ,  Yixiong Yang ,  Yong Yang ,  Srinivas Gandikota

IPC: H01L21/768 ,  H01L21/02

Abstract: Methods for forming a semiconductor structure are described. The method includes cleaning a substrate to form a substrate surface substantially free of oxide, exposing the substrate surface to a first molybdenum precursor, and exposing the substrate surface to a reactant to selectively deposit a first molybdenum film on the substrate surface. The method may be performed in a processing chamber without breaking vacuum. The method may also include forming one or more of a cap layer and a liner and annealing the substrate. The method may also include depositing a second molybdenum film on the substrate surface.

公开(公告)号：US12230688B2

公开(公告)日：2025-02-18

申请号：US17667036

申请日：2022-02-08

Applicant: Applied Materials, Inc.

Inventor： Yong Yang ,  Srinivas Gandikota ,  Steven C. H. Hung ,  Mandyam Sriram ,  Jacqueline S. Wrench ,  Yixiong Yang

IPC: H01L29/51 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78

Abstract: A metal gate stack on a substrate comprises: an interfacial layer on the substrate; a high-κ metal oxide layer on the interfacial layer, the high-κ metal oxide layer comprising a dipole region adjacent to the interfacial layer, the dipole region comprising niobium (Nb); a high-κ metal oxide capping layer on the high-κ metal oxide layer; a positive metal-oxide-semiconductor (PMOS) work function material above the high-κ metal oxide capping layer; and a gate electrode above the PMOS work function material. The dipole region is formed by driving Nb species of a Nb-based film into the high-κ metal oxide layer to form a dipole region.

公开(公告)号：US11894233B2

公开(公告)日：2024-02-06

申请号：US17955996

申请日：2022-09-29

Applicant: Applied Materials, Inc.

Inventor： Yixiong Yang ,  Wei V. Tang ,  Seshadri Ganguli ,  Sang Ho Yu ,  Feng Q. Liu ,  Jeffrey W. Anthis ,  David Thompson ,  Jacqueline S. Wrench ,  Naomi Yoshida

IPC: H01L21/285 ,  C23C16/455 ,  C23C16/18 ,  H01L23/532 ,  C23C16/04

CPC classification number: H01L21/28562 ,  C23C16/04 ,  C23C16/18 ,  C23C16/45553 ,  H01L21/28518 ,  H01L21/28568 ,  H01L23/53242

Abstract: Methods of depositing platinum group metal films of high purity, low resistivity, and good conformality are described. A platinum group metal film is formed in the absence of an oxidant. The platinum group metal film is selectively deposited on a conductive substrate at a temperature less than 200° C. by using an organic platinum group metal precursor.

公开(公告)号：US11587936B2

公开(公告)日：2023-02-21

申请号：US17335287

申请日：2021-06-01

Applicant: Applied Materials, Inc.

Inventor： Yixiong Yang ,  Jacqueline S. Wrench ,  Yong Yang ,  Srinivas Gandikota ,  Annamalai Lakshmanan ,  Joung Joo Lee ,  Feihu Wang ,  Seshadri Ganguli

IPC: H01L27/108 ,  H01L21/285 ,  C23C16/455 ,  H01L21/02 ,  H01L21/8234

Abstract: Methods for DRAM device with a buried word line are described. The method includes forming a metal cap layer and a molybdenum conductor layer in a feature on a substrate. The method includes depositing the metal cap layer on the substrate by physical vapor deposition (PVD) and depositing the molybdenum conductor layer by atomic layer deposition (ALD) on the metal cap layer.

公开(公告)号：US20210288086A1

公开(公告)日：2021-09-16

申请号：US16819023

申请日：2020-03-13

Applicant: Applied Materials, Inc.

Inventor： Luping Li ,  Jacqueline S. Wrench ,  Wen Ting Chen ,  Yixiong Yang ,  In Seok Hwang ,  Shih Chung Chen ,  Srinivas Gandikota

IPC: H01L27/146 ,  C23C16/455 ,  C23C16/20 ,  C23C16/14

Abstract: Methods and apparatus for forming reflector films are described A liner is formed on a substrate surface followed by formation of the reflector layer so that there is no oxygen exposure between liner and reflector layer formation. In some embodiments, a high aspect ratio structure is filled with a reflector material by partially filling the structure with the reflector material while growth is inhibited at a top portion of the structure, reactivating the top portion of the substrate and then filling the structure with the reflector material.