Method for planarizing high step-height integrated circuit structures
    1.
    发明授权
    Method for planarizing high step-height integrated circuit structures 失效
    平面化高步高集成电路结构的方法

    公开(公告)号:US5674773A

    公开(公告)日:1997-10-07

    申请号:US616897

    申请日:1996-03-15

    CPC classification number: H01L21/31051

    Abstract: A method for planarizing a high step-height integrated circuit structure within an integrated circuit. There is first formed upon a semiconductor substrate a high step-height integrated circuit structure. Formed then adjoining the high step-height integrated circuit structure is a patterned Global Planarization Dielectric (GPD) layer. There is then formed upon the exposed surfaces of the semiconductor substrate, the high step-height integrated circuit structure and the patterned Global Planarization Dielectric (GPD) layer a reflowable dielectric layer. Finally, the reflowable dielectric layer is reflowed.

    Abstract translation: 一种用于在集成电路内平坦化高阶高度集成电路结构的方法。 首先在半导体衬底上形成高步高集成电路结构。 形成,然后毗邻高步高集成电路结构是一个图案化的全球平面介电(GPD)层。 然后形成在半导体衬底的暴露表面,高阶高度集成电路结构和图案化全局平面化电介质(GPD)层的可回流电介质层上。 最后,可回流介电层被回流。

    Method of manufacturing a crown shape capacitor in semiconductor memory
using a single step etching
    2.
    发明授权
    Method of manufacturing a crown shape capacitor in semiconductor memory using a single step etching 失效
    使用单步蚀刻在半导体存储器中制造冠状电容器的方法

    公开(公告)号:US5804489A

    公开(公告)日:1998-09-08

    申请号:US679196

    申请日:1996-07-12

    CPC classification number: H01L27/10852 H01L27/10817

    Abstract: The present invention is a method of manufacturing crown shape capacitors in the semiconducter memories. Using a single step etching to farbricate the capacitor in a DRAM cell. The method can form side wall polymers and etching byproductions on the surface of the first polysilicon, using the side wall polymers and the etching byproductions as a mask to form the crown shape capacitors with pillars. Moreover, this present invention can form the crown shape structure and pillars in the same step, the crown shape structure and the pillars increase the surface area of the capacitor. Therefore the present invention will increase the performance of the capacitor.

    Abstract translation: 本发明是在半导体存储器中制造冠状电容器的方法。 使用单步蚀刻来超越DRAM单元中的电容器。 该方法可以使用侧壁聚合物和蚀刻副产物作为掩模形成侧壁聚合物并在第一多晶硅的表面上蚀刻副产物,以形成具有支柱的冠状电容器。 此外,本发明可以在相同的步骤中形成冠状结构和柱,冠状结构和柱增加电容器的表面积。 因此,本发明将增加电容器的性能。

    Method of manufacturing a stacked capacitor having a fin-shaped storage
electrode on a dynamic random access memory cell
    3.
    发明授权
    Method of manufacturing a stacked capacitor having a fin-shaped storage electrode on a dynamic random access memory cell 失效
    制造在动态随机存取存储单元上具有鳍状存储电极的层叠电容器的方法

    公开(公告)号:US5807782A

    公开(公告)日:1998-09-15

    申请号:US533566

    申请日:1995-09-25

    CPC classification number: H01L27/10852 H01L27/10817 H01L28/87 H01L28/88

    Abstract: A method for manufacturing a stacked capacitor having fin-shaped electrodes with increased capacitance on a dynamic random access memory (DRAM) cell, was achieved. The invention eliminates the need for a silicon nitride etch stop layer, which is known to cause stress in the substrate and lead to defects. The capacitor bottom electrodes having fin shaped portions is fabricated by depositing a multilayer of alternate layers of silicon oxide and doped polysilicon on a partially completed DRAM device having FETs. After forming, with single masking step, the node contacts to the substrate in the multilayer and depositing another doped polysilicon layer, the polysilicon layers and oxide layer are patterned to form the electrodes. An important feature of this invention is that the patterned multilayer is etched to the silicon oxide layer over the bottom polysilicon layer and then the silicon oxide layer(s) are isotropically etched (e.g. in HF) to form the fin capacitor. The fin structure is then used as a mask to anisotropically etch the bottom polysilicon layer, and thereby complete and electrically isolate the bottom fin-shaped electrodes. The capacitor is completed by forming the inter-electrode dielectric and depositing a top electrode layer.

    Abstract translation: 实现了在动态随机存取存储器(DRAM)单元上制造具有增加电容的鳍状电极的堆叠电容器的方法。 本发明消除了氮化硅蚀刻停止层的需要,其已知会在衬底中引起应力并导致缺陷。 具有鳍形部分的电容器底部电极通过在具有FET的部分完成的DRAM器件上沉积多层氧化硅和掺杂多晶硅的交替层来制造。 在形成之后,通过单个掩模步骤,节点接触多层中的衬底并沉积另一个掺杂多晶硅层,对多晶硅层和氧化物层进行构图以形成电极。 本发明的一个重要特征是,图案化多层被蚀刻到底部多晶硅层上的氧化硅层上,然后氧化硅层被各向同性地蚀刻(例如在HF中)以形成散热片电容器。 然后将鳍结构用作掩模以各向异性蚀刻底部多晶硅层,从而完成并电隔离底部鳍状电极。 通过形成电极间电介质并沉积顶部电极层来完成电容器。

    Card box
    4.
    外观设计
    Card box 有权

    公开(公告)号:USD1046613S1

    公开(公告)日:2024-10-15

    申请号:US29863052

    申请日:2022-12-15

    Applicant: Bin Liu

    Designer: Bin Liu

    Abstract: FIG. 1 is a front and top perspective view of a card box showing my new design;
    FIG. 2 is a front view thereof;
    FIG. 3 is a rear view thereof;
    FIG. 4 is a left view thereof;
    FIG. 5 is a right view thereof;
    FIG. 6 is a top view thereof;
    FIG. 7 is a bottom view thereof;
    FIG. 8 is a partially exploded perspective view thereof, showing a top portion removed, and a middle portion and a bottom portion partially assembled;
    FIG. 9 is an exploded perspective view thereof, showing a top, middle and a bottom portion; and,
    FIG. 10 is an exploded perspective view thereof.

    Semiconductor devices having gate structures and methods of manufacturing the same
    6.
    发明授权
    Semiconductor devices having gate structures and methods of manufacturing the same 有权
    具有栅极结构的半导体器件及其制造方法

    公开(公告)号:US09590099B2

    公开(公告)日:2017-03-07

    申请号:US14859447

    申请日:2015-09-21

    Abstract: Semiconductor devices are provided including an active layer, a gate structure, a spacer, and a source/drain layer. The active layer is on the substrate and includes germanium. The active layer includes a first region having a first germanium concentration, and a second region on both sides of the first region. The second region has a top surface getting higher from a first portion of the second region adjacent to the first region toward a second portion of the second region far from the first region, and has a second germanium concentration less than the first germanium concentration. The gate structure is formed on the first region of the active layer. The spacer is formed on the second region of the active layer, and contacts a sidewall of the gate structure. The source/drain layer is adjacent to the second region of the active layer.

    Abstract translation: 提供了包括有源层,栅极结构,间隔物和源极/漏极层的半导体器件。 有源层在基底上,包括锗。 有源层包括具有第一锗浓度的第一区域和位于第一区域两侧的第二区域。 第二区域具有从与第一区域相邻的第二区域的第一部分朝向远离第一区域的第二区域的第二部分更高的顶表面,并且具有小于第一锗浓度的第二锗浓度。 栅极结构形成在有源层的第一区域上。 间隔物形成在有源层的第二区域上,并与门结构的侧壁接触。 源极/漏极层与有源层的第二区域相邻。

    VEHICLE SHADING APPARATUS
    7.
    发明申请
    VEHICLE SHADING APPARATUS 审中-公开
    车辆遮光装置

    公开(公告)号:US20160129773A1

    公开(公告)日:2016-05-12

    申请号:US14538287

    申请日:2014-11-11

    Applicant: Bin Liu

    Inventor: Bin Liu

    CPC classification number: B60J11/02

    Abstract: A vehicle shading apparatus may include a first front shading control unit, a first rear shading control unit, a second top shading control unit, and a second rear shading control unit. In one embodiment, one end of the first top shading control unit is connected to the second top shading control unit. One end of the first rear shading control unit and a horizontal supporting unit are connected to the second rear shading control unit. The second top shading control unit and second rear shading control unit both include a shading cloth extending along the body of the vehicle. The present invention is advantageous because it has an automatic shading cloth expand/restore control unit and high-strength supporting unit. It is portable, easy to install and has the shading all around the vehicle to effectively block the sunlight.

    Abstract translation: 车辆遮光装置可以包括第一前遮光控制单元,第一后遮光控制单元,第二顶部遮光控制单元和第二后遮光控制单元。 在一个实施例中,第一顶部遮光控制单元的一端连接到第二顶部遮光控制单元。 第一后遮光控制单元的一端和水平支撑单元连接到第二后遮光控制单元。 第二顶部遮光控制单元和第二后遮光控制单元都包括沿车体延伸的遮光布。 本发明是有利的,因为它具有自动遮光布扩/恢复控制单元和高强度支撑单元。 它是便携式的,易于安装,并且在车辆周围具有阴影,以有效地阻挡阳光。

    Methods for detection and analysis of polynucleotide-binding protein interactions
    9.
    发明授权
    Methods for detection and analysis of polynucleotide-binding protein interactions 有权
    检测和分析多核苷酸结合蛋白相互作用的方法

    公开(公告)号:US08993335B2

    公开(公告)日:2015-03-31

    申请号:US10779412

    申请日:2004-02-13

    CPC classification number: C12Q1/6818 Y10T436/143333 C12Q2565/101

    Abstract: Methods, compositions and articles of manufacture for assaying a sample for a target polynucleotide are provided. A sample suspected of containing the target polynucleotide is contacted with a polycationic multichromophore and a sensor PBP that can bind to the target polynucleotide. The sensor PBP comprises a signaling chromophore to absorb energy from the excited multichromophore and emit light in the presence of the target polynucleotide. The methods can be used in multiplex form. Kits comprising reagents for performing such methods are also provided.

    Abstract translation: 提供了用于测定靶多核苷酸样品的方法,组合物和制品。 将怀疑含有靶多核苷酸的样品与聚阳离子多重色素和可与靶多核苷酸结合的传感器PBP接触。 传感器PBP包括信号发色团,以吸收来自激发的多色素的能量并在靶多核苷酸的存在下发光。 该方法可以多路复用形式使用。 还提供了包含用于执行这些方法的试剂的试剂盒。

    Electronic device for activating and controlling user-controllable functions thereof according to an earphone connected thereto, and associated method
    10.
    发明授权
    Electronic device for activating and controlling user-controllable functions thereof according to an earphone connected thereto, and associated method 有权
    根据与其连接的耳机来激活和控制其用户可控功能的电子设备及相关方法

    公开(公告)号:US08983641B2

    公开(公告)日:2015-03-17

    申请号:US13283597

    申请日:2011-10-28

    CPC classification number: G11B19/08 H04R3/00

    Abstract: An exemplary electronic device is connected with an earphone. The earphone includes a first storage unit storing information as to functions of the earphone. The electronic device includes a second storage unit storing a function information table recording information as to user-controllable functions of the electronic device, function units corresponding to the user-controllable functions, an identifying module, and a control module. The identifying module retrieves the information as to functions stored in the first storage unit, and determines whether one or more of the controllable functions of the electronic device are controllable by the earphone. The control module activates all of the function units corresponding to the controllable functions of the electronic device which are controllable by the earphone, and controls one or more of the activated function units according to one or more control signals transmitted from the earphone to the electronic device. A related method is also provided.

    Abstract translation: 示例性电子设备与耳机连接。 耳机包括存储关于耳机的功能的信息的第一存储单元。 电子设备包括存储关于电子设备的用户可控功能的功能信息表记录信息,与用户可控功能对应的功能单元,识别模块和控制模块的第二存储单元。 识别模块检索关于存储在第一存储单元中的功能的信息,并且确定电子设备的一个或多个可控功能是否可被耳机控制。 控制模块激活对应于由耳机控制的电子设备的可控功能的所有功能单元,并且根据从耳机发送到电子设备的一个或多个控制信号来控制一个或多个激活的功能单元 。 还提供了相关的方法。

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