Abstract:
An apparatus and method are described for reducing the timing skew on a printed circuit board including a plurality of conductive traces interconnecting a first node and a second node. At least one section is removed from at least one printed circuit board trace to thereby sever a trace and prevent signals passing from the first node to the second node from following the severed trace. In this manner, signal path length can be adjusted to reduce timing skews in the circuit. Sections are removed from the traces by using a laser, CVD, a router, a plasma or by passing sufficient current through weakened areas of the traces.
Abstract:
An apparatus which provides the ability to charge or power multiple devices from multiple different power sources, and to communicate electronic data to and from one of the devices. The apparatus utilizes simple construction, requiring no active electronics, thereby reducing the cost of production and the reliability of the device. The apparatus employs a single USB connection cable with connectors on both ends and a second power-only cable and connector which is connected to the power wires of the USB cable and thereby is able to power a second portable device from a single USB port. USB master provide sufficient power for two average portable devices without additional circuitry. Moreover, restricting the data path to only one device also eliminates the need for USB hub circuitry. Finally, greater end user flexibility is provided by using a USB male connector as the source of the data and power connection, a USB female connector for the output of the data and power connection, and a standard barrel-type power connector for the power-only output connection. Having two different output connectors ensures that the user will not confuse the two connectors.
Abstract:
An integrated circuit characterization printed circuit board and method are provided for improving the uniformity of impedance introduced by a test fixture across all of the pins of an integrated circuit device. The printed circuit board includes an array of substantially similar test contacts numbering greater than the pins of the integrated circuit device. The array of test contacts includes an active portion configured for electrically coupling with the corresponding pins on the integrated circuit device and an inactive portion adjacent to the active portion and electrically coupled to a reference signal on the printed circuit board.
Abstract:
The frequency and transient responses of a CMOS differential amplifier are improved by employing one or more compensating capacitors. A compensating capacitor coupled to a differential input of the CMOS differential amplifier is used to inject current into the differential input, such that the net current flow through the gate-to-drain capacitance of a MOS input transistor approaches zero. Thus, the Miller effect with respect to that MOS input transistor is substantially reduced or eliminated, resulting in increased frequency and transient responses for the CMOS differential amplifier. In one embodiment, the CMOS differential amplifier is a CMOS current mirror differential amplifier.
Abstract:
A technique for reducing 1/f noise in an imager, in which the source follower transistor in a pixel circuit is turned off prior to a correlated double sampling (CDS) operation, thereby reducing 1/f noise in the source follower transistor for up to 100 ms. The source follower transistor is then reactivated and a CDS operation and readout is performed normally. This technique substantially reduces the contributions of 1/f noise. The invention also provides a reduction of 1/f noise in an analog amplifier circuit which may process pixel output signals, or more generally, other analog signals, whereby the analog amplifier is turned off during an amplifier reset operation prior to signal amplification. The analog amplifier circuit may be a differential amplifier or a switched capacitor analog amplifier circuit.
Abstract:
The frequency and transient responses of a CMOS differential amplifier are improved by employing one or more compensating capacitors. A compensating capacitor coupled to a differential input of the CMOS differential amplifier is used to inject current into the differential input, such that the net current flow through the gate-to-drain capacitance of a MOS input transistor approaches zero. Thus, the Miller effect with respect to that MOS input transistor is substantially reduced or eliminated, resulting in increased frequency and transient responses for the CMOS differential amplifier. In one embodiment, the CMOS differential amplifier is a CMOS current mirror differential amplifier.
Abstract:
One aspect relates to an oscillator, and various oscillator embodiments comprise an amplifier and line driver with an input and an output and a transmission line with a predetermined transmission signal time delay. The output is adapted to produce an inverted signal with respect to a signal received at the input. The transmission line has a first end connected to the output and a second end connected to the input. Other aspects and embodiments are provided herein.
Abstract:
The present invention comprises switched capacitor amplifiers including positive feedback on semiconductor devices, wafers, and systems incorporating same and methods for amplifying signals using positive feedback, while maintaining a stable gain and producing an improved signal-to-noise ratio. One embodiment includes a switched capacitor amplifier comprising a CMOS amplifier, a feed-in switched capacitor, and a feedback switched capacitor. The feed-in switched capacitor couples an input signal to the non-inverting input of the CMOS amplifier. Similarly, the feedback switched capacitor couples the amplifier output to the non-inverting input to create a positive feedback loop. A capacitance of the feedback switched capacitor relative to a capacitance of the feed-in switched capacitor comprises a feedback proportion. This feedback proportion may be configured to maintain a stable gain of the switched capacitor amplifier and increase a signal-to-noise ratio of the switched capacitor amplifier, even with the switched capacitor amplifier in a positive feedback arrangement.
Abstract:
The frequency and transient responses of a CMOS differential amplifier are improved by employing one or more compensating capacitors. A compensating capacitor coupled to a differential input of the CMOS differential amplifier is used to inject current into the differential input, such that the net current flow through the gate-to-drain capacitance of a MOS input transistor approaches zero. Thus, the Miller effect with respect to that MOS input transistor is substantially reduced or eliminated, resulting in increased frequency and transient responses for the CMOS differential amplifier. In one embodiment, the CMOS differential amplifier is a CMOS current mirror differential amplifier.
Abstract:
One aspect relates to an oscillator, and various oscillator embodiments comprise an amplifier and line driver with an input and an output and a transmission line with a predetermined transmission signal time delay. The output is adapted to produce an inverted signal with respect to a signal received at the input. The transmission line has a first end connected to the output and a second end connected to the input. Other aspects and embodiments are provided herein.