公开(公告)号：US08344391B2

公开(公告)日：2013-01-01

申请号：US12538336

申请日：2009-08-10

Applicant: Pascal Fornara ,  Fabrice Marinet

Inventor： Pascal Fornara ,  Fabrice Marinet

IPC: H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00

CPC classification number: H01L27/101 ,  G11C17/16 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11521

Abstract: An integrated circuit including a substrate of a semiconductor material and first metal portions of a first metallization level or of a first via level defining pixels of an image. The pixels are distributed in first pixels, for each of which the first metal portion is connected to the substrate, and in second pixels, for each of which the first metal portion is separated from the substrate by at least one insulating portion.

Abstract translation: 一种集成电路，包括半导体材料的衬底和第一金属化级的第一金属部分或限定图像像素的第一通孔级。 像素分布在第一像素中，其中第一金属部分连接到基板，并且在第二像素中，其中第一金属部分通过至少一个绝缘部分与基板分离。

公开(公告)号：US20110103584A1

公开(公告)日：2011-05-05

申请号：US12917792

申请日：2010-11-02

Applicant: Pierre-Yvan Liardet ,  Fabrice Marinet

Inventor： Pierre-Yvan Liardet ,  Fabrice Marinet

IPC: H04K1/00

CPC classification number: H04L9/004 ,  H04L9/0625 ,  H04L2209/08 ,  H04L2209/125

Abstract: A method for protecting a key used, by an electronic circuit, in a symmetrical algorithm for ciphering or deciphering a message, including the steps of complementing to one the key and the message; executing the algorithm twice, respectively with the key and the message and with the key and the message complemented to one, the selection between that of the executions which processes the key and the message and that which processes the key and the message complemented to one being random; and checking the consistency between the two executions.

Abstract translation: 一种用于通过电子电路保护用于加密或解密消息的对称算法中的密钥的方法，包括与密钥和消息中的一个相互补充的步骤; 执行算法两次，分别是密钥和消息，并将密钥和消息补充为1，处理密钥和消息的执行处理与处理密钥和消息的处理之间的选择与之互补 随机; 并检查两个执行之间的一致性。

公开(公告)号：US20110062601A1

公开(公告)日：2011-03-17

申请号：US12949314

申请日：2010-11-18

Applicant: Fabrice Marinet

Inventor： Fabrice Marinet

IPC: H01L23/50

CPC classification number: H01L23/544 ,  H01L2223/5444 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The generation of a chip identifier supporting at least one integrated circuit, which includes providing a cutout of at least one conductive path by cutting the chip, the position of the cutting line relative to the chip conditioning the identifier.

Abstract translation: 产生支持至少一个集成电路的芯片标识符，其包括通过切割芯片提供至少一个导电路径的切口，切割线相对于芯片的位置调节该标识符。

公开(公告)号：US06788607B2

公开(公告)日：2004-09-07

申请号：US10406632

申请日：2003-04-03

Applicant: Benjamin Duval ,  Fabrice Marinet

Inventor： Benjamin Duval ,  Fabrice Marinet

IPC: G11C700

CPC classification number: G11C17/18

Abstract: A method of programming a row of antifuse memory cells includes breaking down at least N antifuse elements in the memory cells. The breakdown includes the application of a breakdown voltage to the anode of each antifuse element. The antifuse elements are broken down sequentially by groups of P antifuse elements, with P being less than N and at least equal to 1. The antifuse elements of a same group simultaneously receive the breakdown voltage. The breakdown of a next group of antifuse elements immediately takes place after the breakdown of a previous group of antifuse elements.

Abstract translation: 一种编程反熔丝存储单元的行的方法包括在存储单元中分解至少N个反熔丝元件。 击穿包括向每个反熔丝元件的阳极施加击穿电压。 反熔丝元件依次由P个反熔丝元件分组，其中P小于N并且至少等于1.同一组的反熔丝元件同时接收击穿电压。 下一组反熔丝元件的故障立即发生在上一组反熔丝元件击穿之后。

公开(公告)号：US5981323A

公开(公告)日：1999-11-09

申请号：US854840

申请日：1997-05-12

Applicant: Richard Fournel ,  Fabrice Marinet

Inventor： Richard Fournel ,  Fabrice Marinet

IPC: H01L27/02 ,  H01L21/8238

CPC classification number: H01L27/0259

Abstract: A structure for the protection of a high-voltage pad includes a lateral bipolar transistor, an N-type diffusion of which, connected to the pad to be protected, is made in an N-type tub with a zone that extends laterally outside the tub in the base. A P-type implantation is made on the entire substrate outside the N-type tub except in the region in which the zone extends.

Abstract translation: 用于保护高压焊盘的结构包括横向双极晶体管，其N型扩散连接到待保护焊盘的N型扩散件制成在具有横向外延伸到槽体的区域的N型槽中 在基地。 除了区域延伸的区域外，在N型桶外的整个基板上进行P型注入。

公开(公告)号：US08719666B2

公开(公告)日：2014-05-06

申请号：US13220453

申请日：2011-08-29

Applicant: Fabrice Marinet

Inventor： Fabrice Marinet

IPC: G11C29/00

CPC classification number: H04L9/0866 ,  G06F21/73 ,  G11C7/1006 ,  G11C7/20 ,  G11C7/24 ,  G11C11/41 ,  G11C29/52 ,  G11C2029/0407 ,  H04L2209/04 ,  H04L2209/34

Abstract: A method of extraction of a key from a physical unclonable function using the states of cells of a volatile memory after a powering on, wherein: cells are read according to addresses stored in a non-volatile memory; an error-correction code corrects the read states; and, in case an error has been corrected, the address of the cell providing an erroneous state is replaced in the non-volatile memory with that of another cell providing the non-erroneous state.

Abstract translation: 一种在上电之后使用易失性存储器的单元的状态从物理不可克隆功能中提取密钥的方法，其中：根据存储在非易失性存储器中的地址读取单元; 纠错码纠正读取状态; 并且在错误已被纠正的情况下，提供错误状态的单元的地址在非易失性存储器中被替换为提供非错误状态的另一个单元的地址。

公开(公告)号：US08399280B2

公开(公告)日：2013-03-19

申请号：US12897217

申请日：2010-10-04

Applicant: Pascal Fornara ,  Fabrice Marinet

Inventor： Pascal Fornara ,  Fabrice Marinet

IPC: H01L21/00

CPC classification number: H01L23/573 ,  H01L21/26506 ,  H01L21/3223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for protecting, against laser attacks, an integrated circuit chip formed inside and on top of a semiconductor substrate and including in the upper portion of the substrate an active portion in which are formed components, this method including the steps of: forming in the substrate a gettering area extending under the active portion, the upper limit of the area being at a depth ranging between 5 and 50 μm from the upper surface of the substrate; and introducing diffusing metal impurities into the substrate.

Abstract translation: 一种用于对激光攻击进行保护的方法，在半导体衬底内部和之上形成集成电路芯片，并且在衬底的上部包括形成有部件的有源部分，该方法包括以下步骤： 衬底在有源部分下方延伸的吸气区域，该区域的上限距离衬底的上表面在5至50μm的深度范围内; 并将扩散金属杂质引入衬底中。

公开(公告)号：US07608932B2

公开(公告)日：2009-10-27

申请号：US11234861

申请日：2005-09-23

Applicant: Fabrice Marinet

Inventor： Fabrice Marinet

IPC: H01L23/544

CPC classification number: H01L23/544 ,  H01L2223/5444 ,  H01L2223/5446 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: The generation of an identification number of a chip supporting at least one integrated circuit, including the step of causing a cutting of at least one conductive section by cutting of the chip among several first conductive sections parallel to one another and perpendicular to at least one edge of the chip, the first sections being individually connected, by at least one of their ends, to the chip, and exhibiting different lengths, the position of the cutting line with respect to the chip edge conditioning the identification number.

Abstract translation: 产生支持至少一个集成电路的芯片的识别号，包括通过在彼此平行的并且垂直于至少一个边缘的多个第一导电部分中切割芯片来切割至少一个导电部分的步骤 芯片的第一部分通过其至少一个端部分别连接到芯片并呈现不同的长度，切割线相对于芯片边缘的位置调节识别号码。

公开(公告)号：US20060076663A1

公开(公告)日：2006-04-13

申请号：US11234861

申请日：2005-09-23

Applicant: Fabrice Marinet

Inventor： Fabrice Marinet

IPC: H01L23/02

CPC classification number: H01L23/544 ,  H01L2223/5444 ,  H01L2223/5446 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: The generation of an identification number of a chip supporting at least one integrated circuit, including the step of causing a cutting of at least one conductive section by cutting of the chip among several first conductive sections parallel to one another and perpendicular to at least one edge of the chip, the first sections being individually connected, by at least one of their ends, to the chip, and exhibiting different lengths, the position of the cutting line with respect to the chip edge conditioning the identification number.

公开(公告)号：US06362671B1

公开(公告)日：2002-03-26

申请号：US09771364

申请日：2001-01-26

Applicant: Alexandre Malherbe ,  Fabrice Marinet ,  Alain Pomet

Inventor： Alexandre Malherbe ,  Fabrice Marinet ,  Alain Pomet

IPC: H03K501

Abstract: A device for the regeneration of a clock signal from an external serial bus includes a ring oscillator and counter. The ring oscillator provides n phases of a clock signal. Of these n phases, one phase is used as a reference and is applied to the counter. It is thus possible to count the number of entire reference clock signal periods between a first pulse and a second pulse received from the bus. In reading the state of the phases in the oscillator upon reception of the second pulse, a determination is made for a current phase corresponding to the phase delay between the reference clock signal and the second pulse of the bus. By using a regeneration device that also includes a ring oscillator and a counter, it is possible to regenerate the clock signal of the bus with high precision.