公开(公告)号：US08901708B2

公开(公告)日：2014-12-02

申请号：US13675971

申请日：2012-11-13

Applicant: Intermolecular, Inc.

Inventor： Imran Hashim ,  Hanhong Chen ,  Tony Chiang ,  Indranil De ,  Nobumichi Fuchigami ,  Edward Haywood ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC: H01L21/02 ,  H01L49/02 ,  C23C16/40 ,  C23C16/455 ,  H01L21/314 ,  H01L21/316 ,  H01L27/108

CPC classification number: H01L28/65 ,  C23C16/405 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02697 ,  H01L21/3141 ,  H01L21/31604 ,  H01L27/10852 ,  H01L28/40

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

公开(公告)号：US20130272496A1

公开(公告)日：2013-10-17

申请号：US13914848

申请日：2013-06-11

Applicant: Intermolecular, Inc.

Inventor： Hanhong Chen ,  Edward Haywood ,  Pragati Kumar

IPC: G01N23/223

CPC classification number: G01N23/223 ,  H01L22/12

Abstract: Determining an unknown step coverage of a thin film deposited on a 3D wafer includes exposing a planar wafer comprising a first film deposited thereon to X-ray radiation to create first fluorescent radiation; detecting the first fluorescent radiation; measuring a number of XRF counts on the planar wafer; creating an XRF model of the planar wafer; providing a portion of the 3D wafer comprising troughs and a second film deposited thereon; determining a multiplier factor between the portion of the 3D wafer and the planar wafer; exposing the portion of the 3D wafer to X-ray radiation to create second fluorescent radiation; detecting the second fluorescent radiation; measuring a number of XRF counts on the portion of the 3D wafer; calculating a step coverage of the portion of the 3D wafer; and determining a uniformity of the 3D wafer based on the step coverage of the portion of the 3D wafer.

Abstract translation: 确定沉积在3D晶片上的薄膜的未知步骤覆盖包括将包括沉积在其上的第一膜的平面晶片暴露于X射线辐射以产生第一荧光辐射; 检测第一荧光辐射; 测量平面晶片上的XRF数量; 创建平面晶片的XRF模型; 提供包括槽的3D晶片的一部分和沉积在其上的第二膜; 确定所述3D晶片的所述部分和所述平面晶片之间的乘数; 将3D晶片的部分暴露于X射线辐射以产生第二荧光辐射; 检测第二荧光辐射; 测量3D晶片部分上的XRF数量; 计算3D晶片的部分的台阶覆盖; 以及基于所述3D晶片的所述部分的台阶覆盖来确定所述3D晶片的均匀性。

公开(公告)号：US20130071990A1

公开(公告)日：2013-03-21

申请号：US13677126

申请日：2012-11-14

Applicant: Intermolecular, Inc.

Inventor： Imran Hashim ,  Hanhong Chen ,  Tony Chiang ,  Indranil De ,  Nobi Fuchigami ,  Edward Haywood ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC: H01L21/02

CPC classification number: H01L28/65 ,  C23C16/405 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02697 ,  H01L21/3141 ,  H01L21/31604 ,  H01L27/10852 ,  H01L28/40

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

Abstract translation: 本公开内容提供（a）制造基于钇和钛的氧化物层（例如，电介质层）的方法，以具有高介电常数和低泄漏特性，以及（b）相关的器件和结构。 具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。 在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。 如果需要，可以通过PVD工艺或者通过使用特定的前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺作为反应过程的结果来生产氧化物层 反应。

公开(公告)号：US20130069202A1

公开(公告)日：2013-03-21

申请号：US13677536

申请日：2012-11-15

Applicant: INTERMOLECULAR, INC. ,  ELPIDA MEMORY, INC

Inventor： Xiangxin Rui ,  Takashi Arao ,  Hanhong Chen ,  Naonori Fujiwara ,  Edward Haywood ,  Toshiyuki Hirota ,  Takakazu Kiyomura ,  Kenichi Koyanagi ,  Sandra G. Malhotra

IPC: H01L49/02

CPC classification number: H01L28/60 ,  H01L21/02 ,  H01L27/1085 ,  H01L28/40

Abstract: A method for fabricating a dynamic random access memory capacitor is disclosed. The method may comprise depositing a first titanium nitride (TiN) electrode; creating a first layer of titanium dioxide (TiO2) on the first TiN electrode; depositing a dielectric material on the first layer of titanium dioxide; and depositing a second TiN electrode on the dielectric material.

公开(公告)号：US20130069201A1

公开(公告)日：2013-03-21

申请号：US13675971

申请日：2012-11-13

Applicant: Intermolecular, Inc.

Inventor： Imran Hashim ,  Hanhong Chen ,  Tony Chiang ,  Indranil De ,  Nobumichi Fuchigami ,  Edward Haywood ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC: H01L49/02

CPC classification number: H01L28/65 ,  C23C16/405 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02697 ,  H01L21/3141 ,  H01L21/31604 ,  H01L27/10852 ,  H01L28/40

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

公开(公告)号：US20130071991A1

公开(公告)日：2013-03-21

申请号：US13677239

申请日：2012-11-14

Applicant: Intermolecular, Inc. ,  Elpida Memory, Inc.

Inventor： Xiangxin Rui ,  Takashi Arao ,  Hanhong Chen ,  Naonori Fujiwara ,  Edward Haywood ,  Toshiyuki Hirota ,  Takakazu Kiyomura ,  Kenichi Koyanagi ,  Sandra G. Malhotra

IPC: H01L21/02

CPC classification number: H01L28/60 ,  H01L21/02 ,  H01L27/1085 ,  H01L28/40

Abstract: A method for fabricating a dynamic random access memory capacitor is disclosed. The method may comprise depositing a first titanium nitride (TiN) electrode; creating a first layer of titanium dioxide (TiO2) on the first TiN electrode; depositing a dielectric material on the first layer of titanium dioxide; and depositing a second TiN electrode on the dielectric material.

Abstract translation: 公开了一种用于制造动态随机存取存储器电容器的方法。 该方法可以包括沉积第一氮化钛（TiN）电极; 在第一TiN电极上形成第一层二氧化钛（TiO 2）; 在第一层二氧化钛上沉积电介质材料; 以及在所述电介质材料上沉积第二TiN电极。

公开(公告)号：US08829647B2

公开(公告)日：2014-09-09

申请号：US13737156

申请日：2013-01-09

Applicant: Intermolecular, Inc.

Inventor： Hanhong Chen ,  Edward Haywood ,  Sandra Malhotra ,  Hiroyuki Ode

IPC: H01L29/92 ,  C23C16/455 ,  H01L21/285 ,  H01L49/02

CPC classification number: H01L29/92 ,  C23C16/45525 ,  H01L21/28562 ,  H01L28/65 ,  H01L28/75

Abstract: A first electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the first electrode layer contains a conductive metal oxide formed using a high temperature, low pressure ALD process. The high temperature ALD process results in a layer with enhanced crystallinity, higher density, reduced shrinkage, and lower carbon contamination. The high temperature ALD process can be used for either or both the bottom electrode and the top electrode layers.

Abstract translation: 形成金属绝缘体金属（MIM）DRAM电容器的第一电极层，其中第一电极层含有使用高温低压ALD工艺形成的导电金属氧化物。 高温ALD工艺产生了具有增强的结晶度，较高密度，降低的收缩率和较低的碳污染的层。 高温ALD工艺可以用于底部电极和顶部电极层中的一个或两个。

公开(公告)号：US08900418B2

公开(公告)日：2014-12-02

申请号：US13677126

申请日：2012-11-14

Applicant: Intermolecular, Inc.

Inventor： Imran Hashim ,  Hanhong Chen ,  Tony Chiang ,  Indranil De ,  Nobi Fuchigami ,  Edward Haywood ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

IPC: C23C14/34 ,  B05D5/12 ,  H01L49/02 ,  C23C16/40 ,  C23C16/455 ,  H01L21/314 ,  H01L21/316 ,  H01L27/108 ,  H01L21/02

CPC classification number: H01L28/65 ,  C23C16/405 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02697 ,  H01L21/3141 ,  H01L21/31604 ,  H01L27/10852 ,  H01L28/40

Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

Abstract translation: 本公开内容提供（a）制造基于钇和钛的氧化物层（例如电介质层）的方法，以具有高介电常数和低泄漏特性，以及（b）相关的器件和结构。 具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。 在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。 如果需要，可以通过PVD工艺或者通过使用特定的前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺，作为反应过程的结果来生产氧化物层 反应。

公开(公告)号：US08859301B2

公开(公告)日：2014-10-14

申请号：US13914848

申请日：2013-06-11

Applicant: Intermolecular, Inc.

Inventor： Hanhong Chen ,  Edward Haywood ,  Pragati Kumar

IPC: G01R31/26 ,  H01L21/66 ,  G01N23/223

CPC classification number: G01N23/223 ,  H01L22/12

Abstract: Determining an unknown step coverage of a thin film deposited on a 3D wafer includes exposing a planar wafer comprising a first film deposited thereon to X-ray radiation to create first fluorescent radiation; detecting the first fluorescent radiation; measuring a number of XRF counts on the planar wafer; creating an XRF model of the planar wafer; providing a portion of the 3D wafer comprising troughs and a second film deposited thereon; determining a multiplier factor between the portion of the 3D wafer and the planar wafer; exposing the portion of the 3D wafer to X-ray radiation to create second fluorescent radiation; detecting the second fluorescent radiation; measuring a number of XRF counts on the portion of the 3D wafer; calculating a step coverage of the portion of the 3D wafer; and determining a uniformity of the 3D wafer based on the step coverage of the portion of the 3D wafer.

Abstract translation: 确定沉积在3D晶片上的薄膜的未知步骤覆盖包括将包括沉积在其上的第一膜的平面晶片暴露于X射线辐射以产生第一荧光辐射; 检测第一荧光辐射; 测量平面晶片上的XRF数量; 创建平面晶片的XRF模型; 提供包括槽的3D晶片的一部分和沉积在其上的第二膜; 确定所述3D晶片的所述部分和所述平面晶片之间的乘数; 将3D晶片的部分暴露于X射线辐射以产生第二荧光辐射; 检测第二荧光辐射; 测量3D晶片部分上的XRF数量; 计算3D晶片的部分的台阶覆盖; 以及基于所述3D晶片的所述部分的台阶覆盖来确定所述3D晶片的均匀性。

公开(公告)号：US20140077337A1

公开(公告)日：2014-03-20

申请号：US13737156

申请日：2013-01-09

Applicant: INTERMOLECULAR, INC.

Inventor： Hanhong Chen ,  Edward Haywood ,  Sandra Malhotra ,  Hiroyuki Ode

IPC: H01L29/92

CPC classification number: H01L29/92 ,  C23C16/45525 ,  H01L21/28562 ,  H01L28/65 ,  H01L28/75

Abstract: A first electrode layer for a Metal-Insulator-Metal (MIM) DRAM capacitor is formed wherein the first electrode layer contains a conductive metal oxide formed using a high temperature, low pressure ALD process. The high temperature ALD process results in a layer with enhanced crystallinity, higher density, reduced shrinkage, and lower carbon contamination. The high temperature ALD process can be used for either or both the bottom electrode and the top electrode layers.

Abstract translation: 形成金属绝缘体金属（MIM）DRAM电容器的第一电极层，其中第一电极层含有使用高温低压ALD工艺形成的导电金属氧化物。 高温ALD工艺产生了具有增强的结晶度，较高密度，降低的收缩率和较低的碳污染的层。 高温ALD工艺可以用于底部电极和顶部电极层中的一个或两个。