中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

15 records (took 0.022 seconds)

    Voltage and temperature sensor for a serializer/deserializer communication application
    2.
    发明授权
    Voltage and temperature sensor for a serializer/deserializer communication application 有权
    用于串行器/解串器通信应用的电压和温度传感器

    公开(公告)号：US09212952B1

    公开(公告)日：2015-12-15

    申请号：US13802219

    申请日：2013-03-13

    Applicant: Inphi Corporation

    Inventor： Karthik S. Gopalakrishnan ,  Sadettin Cirit

    IPC: G01K7/00

    CPC classification number: G01K13/00 ,  G01K7/00 ,  G01K7/01 ,  G01K2219/00 ,  G01R19/2503 ,  H04Q9/14

    Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for sensing a voltage and/or temperature from an integrated circuit device such as a Serializer/Deserializer (SerDes) integrated circuit device. But it will be recognized that the technique can be used for monitoring other system on chip devices, such as micro-controllers, digital signal processors, microprocessors, networking devices, application specific integrated circuits, and other integrated circuit devices that may desire on-chip temperature and/or voltage sensing capability.

    Abstract translation: 本发明一般涉及集成电路。 更具体地说，本发明提供了用于从诸如串行器/解串器（SerDes）集成电路器件的集成电路器件感测电压和/或温度的电路和方法。 但是将会认识到，该技术可以用于监视片上设备，例如微控制器，数字信号处理器，微处理器，网络设备，专用集成电路以及可能需要片上的其它集成电路设备 温度和/或电压感测能力。

    Voltage regulator for a serializer/deserializer communication application
    3.
    发明授权
    Voltage regulator for a serializer/deserializer communication application 有权
    用于串行器/解串器通信应用的稳压器

    公开(公告)号：US09178563B2

    公开(公告)日：2015-11-03

    申请号：US14508586

    申请日：2014-10-07

    Applicant: INPHI CORPORATION

    Inventor： Guojun Ren ,  Karthik S. Gopalakrishnan

    IPC: H04B1/38 ,  H04L5/16 ,  H04B3/30 ,  G05F1/10 ,  H04L25/06

    CPC classification number: H04B3/30 ,  G05F1/10 ,  H04L25/06

    Abstract: The voltage regulator device has a wide band amplifier having an input reference voltage, Vref and an input feedback voltage, Vfbk. The device has a source follower coupled to the wide band amplifier, the source follower coupled to an output of the wide band amplifier. The device has a VDD source, a regulator output, and a current source coupled to the source follower and the VDD source. The device has a low frequency path comprising a first transistor. The first transistor has a first gate, a first source, and a first drain. The first source is coupled to the VDD source. The first gate is coupled to a slow node, and the first drain is coupled to the regulator output. The low frequency path comprises a RC network, which has a capacitor, a resistor, and the slow node configured between the resistor and the capacitor. The device has a high frequency path comprising a second transistor. The second transistor has a second gate, a second source, and a second drain. The second source is coupled to the VDD source. The second gate is coupled to a fast node, and the second drain is coupled to the regulator output.

    Abstract translation: 电压调节器装置具有宽带放大器，其具有输入参考电压Vref和输入反馈电压Vfbk。 该器件具有耦合到宽带放大器的源极跟随器，源极跟随器耦合到宽带放大器的输出。 器件具有VDD源，稳压器输出和耦合到源极跟随器和VDD源的电流源。 该器件具有包括第一晶体管的低频路径。 第一晶体管具有第一栅极，第一源极和第一漏极。 第一个源极耦合到VDD源。 第一栅极耦合到慢节点，第一漏极耦合到调节器输出端。 低频路径包括RC网络，其具有电容器，电阻器和配置在电阻器和电容器之间的慢节点。 该器件具有包括第二晶体管的高频路径。 第二晶体管具有第二栅极，第二源极和第二漏极。 第二个源极耦合到VDD源。 第二栅极耦合到快节点，第二漏极耦合到调节器输出。

    CMOS interpolator for a serializer/deserializer communication application
    6.
    发明授权
    CMOS interpolator for a serializer/deserializer communication application 有权
    用于串行器/解串器通信应用的CMOS插值器

    公开(公告)号：US09203605B2

    公开(公告)日：2015-12-01

    申请号：US14637308

    申请日：2015-03-03

    Applicant: INPHI CORPORATION

    Inventor： Karthik S. Gopalakrishnan ,  Guojun Ren

    IPC: H03D3/24 ,  H04L7/033 ,  H04L27/04 ,  H03L7/081

    CPC classification number: H04L7/0331 ,  H03K5/131 ,  H03K5/135 ,  H03L7/08 ,  H03L7/0814 ,  H04L27/04

    Abstract: A phase interpolator (PI) is provided to adjust the phase of a clock such that the phase is aligned to an incoming data pattern from a data stream. The data can be captured from a device such as a flip-flop or the like. The present technique uses a PI (digital to phase) and a digital state machine in a feedback loop to set the correct digital code to the PI inputs to achieve an appropriate clock phase. Of course, there can be variations.

    Abstract translation: 提供相位插值器（PI）以调整时钟的相位，使得该相位与来自数据流的输入数据模式对准。 可以从诸如触发器等的装置捕获数据。 本技术在反馈环路中使用PI（数字到相位）和数字状态机将正确的数字代码设置为PI输入以实现适当的时钟相位。 当然可以有变化。

    High frequency delay lock loop systems
    9.
    发明授权
    High frequency delay lock loop systems 有权
    高频延迟锁定环系统

    公开(公告)号：US09438255B1

    公开(公告)日：2016-09-06

    申请号：US14815694

    申请日：2015-07-31

    Applicant: Inphi Corporation

    Inventor： Guojun Ren ,  James Gorecki ,  Karthik S. Gopalakrishnan

    IPC: H03L7/06 ,  H03L7/085

    CPC classification number: H03L7/0807 ,  H03L7/0805 ,  H03L7/0812 ,  H03L7/085

    Abstract: The present invention is directed to signal processing system and electrical circuits. According to various embodiments, a DLL system includes a delay line provides multiple output signals associated with different clock phases. The delay line may be adjusted using a pair of bias voltages. A phase detector systems generates the bias voltages using the multiple output signals from the delay line. The multiple output signals include signals associated with the first phase, the last phase, and two adjacent phases. There are other embodiments as well.

    Abstract translation: 本发明涉及信号处理系统和电路。 根据各种实施例，DLL系统包括延迟线，其提供与不同时钟相位相关联的多个输出信号。 可以使用一对偏置电压来调整延迟线。 相位检测器系统使用来自延迟线的多个输出信号产生偏置电压。 多个输出信号包括与第一阶段，最后阶段和两个相邻阶段相关联的信号。 还有其它实施例。

    Voltage regulator for a serializer/deserializer communication application
    10.
    发明授权
    Voltage regulator for a serializer/deserializer communication application 有权
    用于串行器/解串器通信应用的稳压器

    公开(公告)号：US08885691B1

    公开(公告)日：2014-11-11

    申请号：US13775041

    申请日：2013-02-22

    Applicant: Inphi Corporation

    Inventor： Guojun Ren ,  Karthik S. Gopalakrishnan

    IPC: H04B1/38 ,  H04L5/16 ,  G05F1/10 ,  H04B3/30

    CPC classification number: H04B3/30 ,  G05F1/10 ,  H04L25/06

    Abstract: The voltage regulator device has a wide band amplifier having an input reference voltage, Vref and an input feedback voltage, Vfbk. The device has a source follower coupled to the wide band amplifier, the source follower coupled to an output of the wide band amplifier. The device has a VDD source, a regulator output, and a current source coupled to the source follower and the VDD source. The device has a low frequency path comprising a first transistor. The first transistor has a first gate, a first source, and a first drain. The first source is coupled to the VDD source. The first gate is coupled to a slow node, and the first drain is coupled to the regulator output. The low frequency path comprises a RC network, which has a capacitor, a resistor, and the slow node configured between the resistor and the capacitor. The device has a high frequency path comprising a second transistor. The second transistor has a second gate, a second source, and a second drain. The second source is coupled to the VDD source. The second gate is coupled to a fast node, and the second drain is coupled to the regulator output.

    Abstract translation: 电压调节器装置具有宽带放大器，其具有输入参考电压Vref和输入反馈电压Vfbk。 该器件具有耦合到宽带放大器的源极跟随器，源极跟随器耦合到宽带放大器的输出。 器件具有VDD源，稳压器输出和耦合到源极跟随器和VDD源的电流源。 该器件具有包括第一晶体管的低频路径。 第一晶体管具有第一栅极，第一源极和第一漏极。 第一个源极耦合到VDD源。 第一栅极耦合到慢节点，第一漏极耦合到调节器输出端。 低频路径包括RC网络，其具有电容器，电阻器和配置在电阻器和电容器之间的慢节点。 该器件具有包括第二晶体管的高频路径。 第二晶体管具有第二栅极，第二源极和第二漏极。 第二个源极耦合到VDD源。 第二栅极耦合到快节点，第二漏极耦合到调节器输出。

Patent Agency Ranking