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公开(公告)号:US20230084375A1
公开(公告)日:2023-03-16
申请号:US17475123
申请日:2021-09-14
Applicant: Intel Corporation
Inventor: Priyanka Dobriyal , Ankur Agrawal , Anna M. Prakash , Ann J. Xu , Jimin Yao , Raiyomand F. Aspandiar , Lesley A. Polka Wood , Abigail G. Agwai , Kayleen L. E. Helms
IPC: H01S5/0237 , H01S5/0234
Abstract: An apparatus comprising an integrated circuit chip comprising a first surface region and a second surface region adjacent to the first surface region; a substrate coupled to the integrated circuit chip through a plurality of connections comprising solder; and underfill between the substrate and the integrated circuit chip, wherein the underfill contacts the second surface region, but does not contact the first surface region.
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公开(公告)号:US20210066882A1
公开(公告)日:2021-03-04
申请号:US16554789
申请日:2019-08-29
Applicant: INTEL CORPORATION
Inventor: Priyanka Dobriyal , Susheel G. Jadhav , Ankur Agrawal , Quan A. Tran , Raiyomand F. Aspandiar , Kenneth M. Brown
Abstract: An integrated circuit assembly includes a support (e.g., package substrate or circuit board) and a semiconductor die including a device. The semiconductor die is mounted to the support with the device facing the support. The device can be, for example, a quantum well laser device or a photonics device. A layer of decoupling material is on the device. An underfill material is between the semiconductor die and the support, where the decoupling material is between the device and the underfill material. The decoupling layer decouples stress from transferring from the underfill material into the device. For example, the decoupling material forms only weak bonds with the underfill material and/or a passivation layer on the device, in an embodiment. Weak bonds include non-covalent bonds and non-ionic bonds, for example. The decoupling material can be, for instance, a PTFE film, a poly(p-xylylene) film, a fluorocarbon, or a compound lacking free hydroxyl groups.
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公开(公告)号:US10356912B2
公开(公告)日:2019-07-16
申请号:US15257726
申请日:2016-09-06
Applicant: Intel Corporation
Inventor: Priyanka Dobriyal , Suriyakala Ramalingam , Chester C. Lee , Raiyomand F. Aspandiar
Abstract: An electronic system includes a printed circuit board (PCB), a component affixed to the PCB, and a conformal coating layer on the PCB and the component. The conformal coating layer includes parylene. Furthermore, the electronic system includes an underfill layer adjacent to the conformal coating layer, filling a gap between the PCB and the component. Other embodiments being described and/or claimed.
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公开(公告)号:US12237442B2
公开(公告)日:2025-02-25
申请号:US17100595
申请日:2020-11-20
Applicant: Intel Corporation
Inventor: Ankur Agarwal , Priyanka Dobriyal
Abstract: Embodiments disclosed herein include electronic packages with vents to prevent pressure buildup below a die. In an embodiment, an electronic package comprises a package substrate and a die attached to the package substrate by interconnects. In an embodiment, an underfill is under the die and surrounds the interconnects. In an embodiment, a void is provided in the underfill, and a vent is in the underfill. In an embodiment, the vent is fluidically coupled to the void and extends to an edge of the underfill.
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公开(公告)号:US11894474B2
公开(公告)日:2024-02-06
申请号:US16562889
申请日:2019-09-06
Applicant: Intel Corporation
Inventor: Priyanka Dobriyal , Ankur Agrawal , Susheel Jadhav , Quan Tran , Raghuram Narayan , Raiyomand Aspandiar , Kenneth Brown , John Heck
IPC: H01L31/02 , H01L31/0232 , G02B3/00 , H01L31/0216 , H01L25/16 , H01L31/18 , G02B1/11 , G02B6/42 , H01L23/538 , G02B6/24
CPC classification number: H01L31/02327 , G02B1/11 , G02B3/0012 , G02B3/0056 , G02B6/428 , H01L23/5385 , H01L25/167 , H01L31/02005 , H01L31/02019 , H01L31/02161 , H01L31/1876 , G02B6/241
Abstract: Embodiments disclosed herein include optoelectronic systems and methods of forming such systems. In an embodiment the optoelectronic system comprises a board, and a carrier attached to the board. In an embodiment, a first die is on the carrier. In an embodiment, the first die is a photonics die, and a surface of the first die is covered by an optically transparent layer.
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公开(公告)号:US11715928B2
公开(公告)日:2023-08-01
申请号:US16554789
申请日:2019-08-29
Applicant: INTEL CORPORATION
Inventor: Priyanka Dobriyal , Susheel G. Jadhav , Ankur Agrawal , Quan A. Tran , Raiyomand F. Aspandiar , Kenneth M. Brown
IPC: H01S5/0234 , G02F1/015 , H01S5/0237 , H01S5/02234 , H01S5/02325 , H01S5/026
CPC classification number: H01S5/0234 , G02F1/015 , H01S5/0237 , H01S5/02234 , H01S5/02325 , H01S5/0261
Abstract: An integrated circuit assembly includes a support (e.g., package substrate or circuit board) and a semiconductor die including a device. The semiconductor die is mounted to the support with the device facing the support. The device can be, for example, a quantum well laser device or a photonics device. A layer of decoupling material is on the device. An underfill material is between the semiconductor die and the support, where the decoupling material is between the device and the underfill material. The decoupling layer decouples stress from transferring from the underfill material into the device. For example, the decoupling material forms only weak bonds with the underfill material and/or a passivation layer on the device, in an embodiment. Weak bonds include non-covalent bonds and non-ionic bonds, for example. The decoupling material can be, for instance, a PTFE film, a poly(p-xylylene) film, a fluorocarbon, or a compound lacking free hydroxyl groups.
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公开(公告)号:US20180070456A1
公开(公告)日:2018-03-08
申请号:US15257726
申请日:2016-09-06
Applicant: Intel Corporation
Inventor: Priyanka Dobriyal , Suriyakala Ramalingam , Chester C. Lee , Raiyomand F. Aspandiar
CPC classification number: H05K3/284 , H01L21/563 , H05K1/18 , H05K3/285 , H05K2201/09872 , H05K2201/10977 , H05K2203/1338 , H05K2203/304
Abstract: An electronic system may include a printed circuit board (PCB), a component affixed to the PCB, and a conformal coating layer on the PCB and the component. The conformal coating layer may include parylene. Furthermore, the electronic system may include an underfill layer adjacent to the conformal coating layer, filling a gap between the PCB and the component. Other embodiments may be described and/or claimed.
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