公开(公告)号：US09252153B1

公开(公告)日：2016-02-02

申请号：US14493021

申请日：2014-09-22

Applicant: Macronix International Co., Ltd.

Inventor： Cheng-Yi Lung ,  An-Chyi Wei ,  Ta Hung Yang

IPC: H01L29/66 ,  H01L29/76 ,  H01L27/088 ,  H01L27/115 ,  H01L29/51 ,  H01L21/768 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/3205 ,  H01L29/423 ,  H01L29/792 ,  H01L23/528

CPC classification number: H01L27/11568 ,  H01L21/28273 ,  H01L21/31111 ,  H01L21/32051 ,  H01L21/32053 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76877 ,  H01L23/528 ,  H01L27/11524 ,  H01L27/11582 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/42376 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/792 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semi-damascene method is described for fabricating wordlines without stringers while maintaining critical cell dimensions when wordline pitch is less than 40 nm. A thin conducting layer protects a storage layer during manufacture, the thin conducting layer then making contact with filled-in conducting material.

Abstract translation: 描述了一种半镶嵌方法，用于在没有桁条的情况下制造字线，同时在字线间距小于40nm时保持临界单元尺寸。 薄的导电层在制造过程中保护存储层，然后薄导电层与填充的导电材料接触。

公开(公告)号：US20160172294A1

公开(公告)日：2016-06-16

申请号：US14571686

申请日：2014-12-16

Applicant: MACRONIX International Co., Ltd.

Inventor： Sheng-Yuan Chang ,  An-Chyi Wei ,  Nan-Tsu Lian ,  Ta-Hone Yang ,  Kuang-Chao Chen

IPC: H01L23/528 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A high aspect ratio structure is provided. The high aspect ratio structure includes a substrate, a plurality of stack structures, and a plurality of support structures. The stack structures are disposed on the substrate, and a trench is formed between adjacent two stack structures. Each of the stack structures includes a plurality of first material layers and a plurality of second material layers. The second material layers and the first material layers are disposed alternately. The support structures are respectively disposed between the substrate and the stack structures, wherein each of the support structures has a concave-convex surface.

Abstract translation: 提供了高纵横比结构。 高纵横比结构包括基板，多个堆叠结构和多个支撑结构。 堆叠结构设置在衬底上，并且在相邻的两个堆叠结构之间形成沟槽。 每个堆叠结构包括多个第一材料层和多个第二材料层。 第二材料层和第一材料层交替设置。 支撑结构分别设置在基板和堆叠结构之间，其中每个支撑结构具有凹凸表面。

公开(公告)号：US09190467B2

公开(公告)日：2015-11-17

申请号：US14149873

申请日：2014-01-08

Applicant: Macronix International Co., Ltd.

Inventor： Erh-Kun Lai ,  Guan-Ru Lee ,  An-Chyi Wei ,  Hang-Ting Lue

IPC: H01L29/06 ,  H01L27/115 ,  H01L29/78 ,  H01L29/40

CPC classification number: H01L29/0603 ,  H01L27/11578 ,  H01L29/401 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/7843

Abstract: A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a substrate, a stacked strip structure, and a tensile material strip. The stacked strip structure is formed vertically on the substrate, the stacked strip structure having compressive stress. The stacked strip structure comprises a plurality of conductive strips and a plurality of insulating strips, and the conductive strips and the insulating strips are interlaced. The tensile material strip is formed on the stacked strip structure, the tensile material strip having tensile stress.

Abstract translation: 提供了一种半导体结构及其制造方法。 半导体结构包括基板，堆叠带状结构和拉伸材料带。 堆叠的带状结构垂直地形成在基板上，堆叠的带状结构具有压应力。 堆叠的带状结构包括多个导电条和多个绝缘条，并且导电条和绝缘条是交错的。 拉伸材料带形成在堆叠的带状结构上，拉伸材料带具有拉伸应力。

公开(公告)号：US20150194481A1

公开(公告)日：2015-07-09

申请号：US14149873

申请日：2014-01-08

Applicant: Macronix International Co., Ltd.

Inventor： Erh-Kun Lai ,  Guan-Ru Lee ,  An-Chyi Wei ,  Hang-Ting Lue

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/78

CPC classification number: H01L29/0603 ,  H01L27/11578 ,  H01L29/401 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/7843

Abstract: A semiconductor structure and a manufacturing method of the same are provided. The semiconductor structure includes a substrate, a stacked strip structure, and a tensile material strip. The stacked strip structure is formed vertically on the substrate, the stacked strip structure having compressive stress. The stacked strip structure comprises a plurality of conductive strips and a plurality of insulating strips, and the conductive strips and the insulating strips are interlaced. The tensile material strip is formed on the stacked strip structure, the tensile material strip having tensile stress.

Abstract translation: 提供了一种半导体结构及其制造方法。 半导体结构包括基板，堆叠带状结构和拉伸材料带。 堆叠的带状结构垂直地形成在基板上，堆叠的带状结构具有压应力。 堆叠的带状结构包括多个导电条和多个绝缘条，并且导电条和绝缘条是交错的。 拉伸材料带形成在堆叠的带状结构上，拉伸材料带具有拉伸应力。