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    Methods for suppressing power plane noise
    1.
    发明授权
    Methods for suppressing power plane noise 有权
    抑制电源平面噪声的方法

    公开(公告)号：US08743555B2

    公开(公告)日：2014-06-03

    申请号：US13965412

    申请日：2013-08-13

    Applicant: Micron Technology, Inc.

    Inventor： Houfei Chen ,  Shiyou Zhao

    IPC: H05K1/18 ,  H05K3/02

    CPC classification number: H05K1/0216 ,  G11C5/04 ,  G11C5/063 ,  H05K1/0298 ,  H05K1/162 ,  H05K2201/09309 ,  H05K2201/09636 ,  H05K2201/09981 ,  H05K2203/0733 ,  Y10T29/4913 ,  Y10T29/49155

    Abstract: Substrates having power planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a first power plane and a second power plane. The at least one noise suppression structure may include a first power plane extension that extends from the first power plane generally toward the second power plane, and a second power plane extension that extends from the second power plane generally toward the first power plane. Methods for suppressing noise in at least one of the first power plane and second power plane include providing such noise suppression structures between the power planes.

    Abstract translation: 具有诸如印刷电路板的电源层的衬底包括至少一个噪声抑制结构，其被配置为抑制通过第一电力平面和第二电力平面中的至少一个传播的电波。 至少一个噪声抑制结构可以包括从第一电力平面大致朝向第二电力平面延伸的第一电力平面延伸部，以及从第二电力平面大致向第一电力平面延伸的第二电力平面延伸部。 用于抑制第一电力平面和第二电力平面中的至少一个中的噪声的方法包括在电力平面之间提供这种噪声抑制结构。

    METHODS FOR SUPPRESSING POWER PLANE NOISE
    2.
    发明申请
    METHODS FOR SUPPRESSING POWER PLANE NOISE 有权
    抑制动力平面噪声的方法

    公开(公告)号：US20130326871A1

    公开(公告)日：2013-12-12

    申请号：US13965412

    申请日：2013-08-13

    Applicant: Micron Technology, Inc.

    Inventor： Houfei Chen ,  Shiyou Zhao

    IPC: H05K1/02

    CPC classification number: H05K1/0216 ,  G11C5/04 ,  G11C5/063 ,  H05K1/0298 ,  H05K1/162 ,  H05K2201/09309 ,  H05K2201/09636 ,  H05K2201/09981 ,  H05K2203/0733 ,  Y10T29/4913 ,  Y10T29/49155

    Abstract: Substrates having power planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a first power plane and a second power plane. The at least one noise suppression structure may include a first power plane extension that extends from the first power plane generally toward the second power plane, and a second power plane extension that extends from the second power plane generally toward the first power plane. Methods for suppressing noise in at least one of the first power plane and second power plane include providing such noise suppression structures between the power planes.

    Abstract translation: 具有诸如印刷电路板的电源层的衬底包括至少一个噪声抑制结构，其被配置为抑制通过第一电力平面和第二电力平面中的至少一个传播的电波。 至少一个噪声抑制结构可以包括从第一电力平面大致朝向第二电力平面延伸的第一电力平面延伸部，以及从第二电力平面大致向第一电力平面延伸的第二电力平面延伸部。 用于抑制第一电力平面和第二电力平面中的至少一个中的噪声的方法包括在电力平面之间提供这种噪声抑制结构。

    METHOD FOR FORMING A CIRCUIT BOARD VIA STRUCTURE FOR HIGH SPEED SIGNALING
    5.
    发明申请
    METHOD FOR FORMING A CIRCUIT BOARD VIA STRUCTURE FOR HIGH SPEED SIGNALING 有权
    通过高速信号结构形成电路板的方法

    公开(公告)号：US20150250060A1

    公开(公告)日：2015-09-03

    申请号：US14713836

    申请日：2015-05-15

    Applicant: Micron Technology, Inc.

    Inventor： Shiyou Zhao ,  Houfei Chen ,  Hao Wang

    IPC: H05K3/42 ,  H05K3/10

    CPC classification number: H05K3/429 ,  H05K1/0222 ,  H05K1/115 ,  H05K1/162 ,  H05K3/10 ,  H05K3/42 ,  H05K2201/09809 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/4916 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T29/49167

    Abstract: One embodiment of the invention comprises an improved method for making a via structure for use in a printed circuit board (PCB). The via allows for the passage of a signal from one signal plane to another in the PCB, and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes.

    Abstract translation: 本发明的一个实施例包括用于制造用于印刷电路板（PCB）的通孔结构的改进方法。 该通孔允许信号从PCB中的一个信号平面传递到另一个信号平面，并且这样做会超过信号平面之间的电源和接地平面。 为了最小化电源和接地层之间的电磁干扰，由于信号返回电流引起的信号损耗以及通孔到通孔耦合，通孔被屏蔽在两个同心圆柱体中，每个连接到电源和接地层之一。

    Method for Forming a Circuit Board Via Structure for High Speed Signaling
    6.
    发明申请
    Method for Forming a Circuit Board Via Structure for High Speed Signaling 有权
    通过高速信号结构形成电路板的方法

    公开(公告)号：US20130340250A1

    公开(公告)日：2013-12-26

    申请号：US14010051

    申请日：2013-08-26

    Applicant: Micron Technology, Inc.

    Inventor： Shiyou Zhao ,  Houfei Chen ,  Hao Wang

    IPC: H05K3/42

    CPC classification number: H05K3/429 ,  H05K1/0222 ,  H05K1/115 ,  H05K1/162 ,  H05K3/10 ,  H05K3/42 ,  H05K2201/09809 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/4916 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T29/49167

    Abstract: One embodiment of the invention comprises an improved method for making a via structure for use in a printed circuit board (PCB). The via allows for the passage of a signal from one signal plane to another in the PCB, and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes.

    Abstract translation: 本发明的一个实施例包括用于制造用于印刷电路板（PCB）的通孔结构的改进方法。 该通孔允许信号从PCB中的一个信号平面传递到另一个信号平面，并且这样做会超过信号平面之间的电源和接地平面。 为了最小化电源和接地层之间的电磁干扰，由于信号返回电流引起的信号损耗以及通孔到通孔耦合，通孔被屏蔽在两个同心圆柱体中，每个连接到电源和接地层之一。

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