Systems and methods for processing errors in digital beamforming receivers

    公开(公告)号:US11977181B2

    公开(公告)日:2024-05-07

    申请号:US17069675

    申请日:2020-10-13

    Applicant: NXP B.V.

    CPC classification number: G01S7/4021 G06F7/24 H03M1/1215 H03M1/1245 G01S7/027

    Abstract: An apparatus, such as a radar system that conducts beamforming operations, includes a plurality of analog-to-digital-converters (ADCs) and an error correction system coupled to the ADCs. Based upon an assessment of a plurality of errors associated with the ADCs by the error correction system, the error correction system programs sampling operations for the ADCs. The error correction system includes an error correction unit that identifies the plurality of errors associated with a plurality of sub-ADCs of the ADCs, a selection unit coupled to the error correction unit that sorts the errors associated with the plurality of sub-ADCs, and a programming unit coupled to the selection unit that reconfigures the sorted errors to generate a sequence of sampling operations for the plurality of sub-ADCs. Using, for example, a barrel shifter function, the sorted errors are reconfigured by the programming unit such that a summation of elements in each column in a matrix in which the sorted errors are stored are within a predefined value.

    SYSTEMS AND METHODS FOR PROCESSING ERRORS IN DIGITAL BEAMFORMING RECEIVERS

    公开(公告)号:US20220113373A1

    公开(公告)日:2022-04-14

    申请号:US17069675

    申请日:2020-10-13

    Applicant: NXP B.V.

    Abstract: An apparatus, such as a radar system that conducts beamforming operations, includes a plurality of analog-to-digital-converters (ADCs) and an error correction system coupled to the ADCs. Based upon an assessment of a plurality of errors associated with the ADCs by the error correction system, the error correction system programs sampling operations for the ADCs. The error correction system includes an error correction unit that identifies the plurality of errors associated with a plurality of sub-ADCs of the ADCs, a selection unit coupled to the error correction unit that sorts the errors associated with the plurality of sub-ADCs, and a programming unit coupled to the selection unit that reconfigures the sorted errors to generate a sequence of sampling operations for the plurality of sub-ADCs. Using, for example, a barrel shifter function, the sorted errors are reconfigured by the programming unit such that a summation of elements in each column in a matrix in which the sorted errors are stored are within a predefined value.

    Analog-to-digital converter
    6.
    发明授权

    公开(公告)号:US10014875B1

    公开(公告)日:2018-07-03

    申请号:US15849856

    申请日:2017-12-21

    Applicant: NXP B.V.

    Abstract: An analog-to-digital converter including a converter arrangement configured to provide a digital output signal as an output of the analog-to-digital converter based on an analog input signal comprising an input to the analog-to-digital converter, the analog-to-digital converter including a calibration module configured to provide calibration signalling to set one or more of a gain of one or more components of the converter arrangement and an offset of one or more components of the converter arrangement, the calibration module further configured to provide, as an output, diagnostic information based on the calibration signalling for use in determining the occurrence of a fault in the analog-to-digital converter.

    Systems and methods for calibration of in-phase/quadrature (I/Q) modulators

    公开(公告)号:US11228478B1

    公开(公告)日:2022-01-18

    申请号:US17069669

    申请日:2020-10-13

    Applicant: NXP B.V.

    Abstract: A wireless transceiver system includes a transmitter and a receiver. The transmitter includes a digital processor and a self-correction modulator coupled to the digital processor, wherein based upon a calibration correction assessment of an in-phase (I) signal and a quadrature (Q) signal received from the digital processor, the self-correction modulator generates a calibrated modulated signal. The self-correction modulator includes a core modulator and a calibration correction unit. The calibration correction unit is configured to correct an output of the core modulator based upon the calibration correction assessment. The calibration correction unit includes a calibration processing unit and a calibration modulator, wherein the calibration processing unit provides correction quantities that are used to program the calibration modulator to provide the self-corrected modulated signal.

    Method and system for performing analog-to-digital conversion
    9.
    发明授权
    Method and system for performing analog-to-digital conversion 有权
    用于执行模数转换的方法和系统

    公开(公告)号:US09350375B1

    公开(公告)日:2016-05-24

    申请号:US14685501

    申请日:2015-04-13

    Applicant: NXP B.V.

    CPC classification number: H03M1/12 H03M1/1215 H03M1/1265

    Abstract: Methods and systems for performing analog-to-digital conversion are described. In one embodiment, a method for performing analog-to-digital conversion involves processing an analog impulse signal to obtain an impulse pattern of the analog impulse signal in a first signal processing path and converting the analog impulse signal into a digital signal based on the impulse pattern in a second signal processing path that is in parallel with the first signal processing path. The impulse pattern of the analog impulse signal includes duty cycle information of the analog impulse signal. Other embodiments are also described.

    Abstract translation: 描述用于执行模数转换的方法和系统。 在一个实施例中,用于执行模数转换的方法涉及处理模拟脉冲信号以在第一信号处理路径中获得模拟脉冲信号的脉冲模式,并且基于脉冲将模拟脉冲信号转换为数字信号 在与第一信号处理路径并联的第二信号处理路径中的图案。 模拟脉冲信号的脉冲模式包括模拟脉冲信号的占空比信息。 还描述了其它实施例。

Patent Agency Ranking