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    VOLTAGE-TO-CURRENT ARCHITECTURE AND ERROR CORRECTION SCHEMES
    1.
    发明申请
    VOLTAGE-TO-CURRENT ARCHITECTURE AND ERROR CORRECTION SCHEMES 有权

    公开(公告)号：US20210231710A1

    公开(公告)日：2021-07-29

    申请号：US17154758

    申请日：2021-01-21

    Applicant: QUALCOMM Incorporated

    Inventor： Ramkumar SIVAKUMAR ,  Jingxue LU ,  Sherif GALAL ,  Xinwang ZHANG ,  Kshitij YADAV

    IPC: G01R19/00 ,  H04R3/00 ,  H03F3/217 ,  H03F1/02

    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.

    VOLTAGE-TO-CURRENT ARCHITECTURE AND ERROR CORRECTION SCHEMES
    3.
    发明申请
    VOLTAGE-TO-CURRENT ARCHITECTURE AND ERROR CORRECTION SCHEMES 有权

    公开(公告)号：US20230137935A1

    公开(公告)日：2023-05-04

    申请号：US18146832

    申请日：2022-12-27

    Applicant: QUALCOMM Incorporated

    Inventor： Ramkumar SIVAKUMAR ,  Jingxue LU ,  Sherif GALAL ,  Xinwang ZHANG ,  Kshitij YADAV

    IPC: G01R19/00 ,  H04R3/00 ,  H03F3/217 ,  H03F1/02

    Abstract: Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.

    AUDIO NON-LINEARITY CANCELLATION FOR SWITCHES FOR AUDIO AND OTHER APPLICATIONS
    4.
    发明申请
    AUDIO NON-LINEARITY CANCELLATION FOR SWITCHES FOR AUDIO AND OTHER APPLICATIONS 有权

    公开(公告)号：US20220376730A1

    公开(公告)日：2022-11-24

    申请号：US17323685

    申请日：2021-05-18

    Applicant: QUALCOMM Incorporated

    Inventor： Kshitij YADAV ,  Vijayakumar DHANASEKARAN

    IPC: H04B1/40 ,  H03F3/193 ,  H03F3/185

    Abstract: An aspect includes an apparatus including a first amplifier; a first field effect transistor (FET) including a first source coupled to an output of the first amplifier, and a first drain for coupling to a first load; and a first gate drive circuit including an input coupled to the output of the first amplifier and an output coupled to a first gate of the first FET. Another aspect includes a method including amplifying a first audio signal using a first audio amplifier to generate a first voltage; generating a first gate voltage based on the first voltage; applying the first gate voltage to a first gate of a first field effect transistor (FET) coupled between the first audio amplifier and a first audio transducer; and applying the first voltage to a first source of the first FET.

    FULLY DIFFERENTIAL ESD CIRCUIT FOR HIGH-FREQUENCY APPLICATIONS
    5.
    发明公开
    FULLY DIFFERENTIAL ESD CIRCUIT FOR HIGH-FREQUENCY APPLICATIONS 审中-公开

    公开(公告)号：US20240178662A1

    公开(公告)日：2024-05-30

    申请号：US18070386

    申请日：2022-11-28

    Applicant: QUALCOMM Incorporated

    Inventor： Kshitij YADAV ,  Vijayakumar DHANASEKARAN ,  Khaled Mahmoud ABDELFATTAH ALY ,  Ramkumar SIVAKUMAR

    IPC: H02H9/04

    CPC classification number: H02H9/046

    Abstract: A differential ESD circuit is provided for protecting a pair of differential terminals of an integrated circuit from electrostatic shock. A first diode couples between a first terminal in the pair of differential terminals and a first resistor that couples to a voltage node of the integrated circuit. Similarly, a second diode couples between a second terminal in the pair of differential terminals and a second resistor that couples to the voltage node of the integrated circuit. The first and second resistors isolate the first and second terminals from a capacitive loading that would otherwise exist from the first and second diodes.

    CLAMP CIRCUIT
    7.
    发明申请
    CLAMP CIRCUIT 有权

    公开(公告)号：US20210232169A1

    公开(公告)日：2021-07-29

    申请号：US17143382

    申请日：2021-01-07

    Applicant: QUALCOMM Incorporated

    Inventor： Kshitij YADAV ,  Sherif GALAL

    IPC: G05F3/26 ,  H03M1/12 ,  H02H9/04

    Abstract: In certain aspects, a clamp circuit includes a first current mirror having a first branch and a second branch, wherein the first current mirror is configured to mirror a current flowing through the first branch of the first current mirror to the second branch of the first current mirror. The clamp circuit also includes a second current mirror having a first branch and a second branch, wherein the second current mirror is configured to mirror a current flowing through the first branch of the second current mirror to the second branch of the second current mirror. The first branch of the first current mirror is coupled in series with the second branch of the second current mirror, and the second branch of the first current mirror is coupled in series with the first branch of the second current mirror.

    AUDIO NON-LINEARITY CANCELLATION FOR SWITCHES FOR AUDIO AND OTHER APPLICATIONS
    9.
    发明申请
    AUDIO NON-LINEARITY CANCELLATION FOR SWITCHES FOR AUDIO AND OTHER APPLICATIONS 有权

    公开(公告)号：US20230049081A1

    公开(公告)日：2023-02-16

    申请号：US17974030

    申请日：2022-10-26

    Applicant: QUALCOMM Incorporated

    Inventor： Kshitij YADAV ,  Vijayakumar DHANASEKARAN

    IPC: H04B1/40 ,  H03F3/185 ,  H03F3/193

    Abstract: An aspect includes an apparatus including a first amplifier; a first field effect transistor (FET) including a first source coupled to an output of the first amplifier, and a first drain for coupling to a first load; and a first gate drive circuit including an input coupled to the output of the first amplifier and an output coupled to a first gate of the first FET. Another aspect includes a method including amplifying a first audio signal using a first audio amplifier to generate a first voltage; generating a first gate voltage based on the first voltage; applying the first gate voltage to a first gate of a first field effect transistor (FET) coupled between the first audio amplifier and a first audio transducer; and applying the first voltage to a first source of the first FET.

    LOW-GLITCH SWITCH CONTROL FOR MODE SWITCHING OF MEMORY CELLS
    10.
    发明申请
    LOW-GLITCH SWITCH CONTROL FOR MODE SWITCHING OF MEMORY CELLS 有权

    公开(公告)号：US20220059138A1

    公开(公告)日：2022-02-24

    申请号：US17000163

    申请日：2020-08-21

    Applicant: QUALCOMM Incorporated

    Inventor： Kshitij YADAV ,  Vijayakumar DHANASEKARAN ,  Yan WANG

    IPC: G11C5/14 ,  H03K19/20

    Abstract: An apparatus for power supply mode switching includes a first voltage regulator to output a first voltage, a second voltage regulator to output a second voltage, a third voltage regulator to output a third voltage, an electronic load, a first switch between the first voltage regulator and the electronic load, a second switch between the second voltage regulator and the electronic load, and a third switch between the third voltage regulator and the electronic load. And, a method for power supply mode switching includes supplying power to an electronic load with a first voltage; switching to a second voltage; maintaining coupling of the electronic load with the second voltage while a voltage across the electronic load is less than a reference voltage; and switching to a third voltage when the voltage is greater than or equal to the reference voltage and the third voltage is less than the second voltage.

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