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公开(公告)号:US20190149039A1
公开(公告)日:2019-05-16
申请号:US16055792
申请日:2018-08-06
Applicant: RAYTHEON COMPANY
Inventor: Boris S. Jacobson , Steven D. Bernstein , Steven M. Lardizabal , Jason Adams , Jeffrey R. Laroche
CPC classification number: H02M1/44 , H01F27/2804 , H01F27/2885 , H01F27/365 , H01F2027/2809 , H01F2027/2819 , H02M1/4258 , H05K1/165 , H05K2201/086
Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.
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公开(公告)号:US11979129B2
公开(公告)日:2024-05-07
申请号:US17648279
申请日:2022-01-18
Applicant: Raytheon Company
Inventor: Steven M. Lardizabal
CPC classification number: H03H11/20 , H03H7/19 , H03K2005/00286
Abstract: Apparatus and associated methods relate to a low-noise wideband active phase shifter. The low-noise wideband active phase shifter includes first and second transconductance cells, a fixed LC series network and a tunable LC series network configured to form an all-pass lattice network. The first and second transconductance cells, each include a transistor, a feedback network, and a transistor biasing network. The transistor has an input terminal and an output terminal. The negative feedback network electrically couples the input and output terminals of the transistor. The biasing network provides input and output biasing of the transistor. The fixed LC series network connects between the first and the second transconductance cells. The tunable LC series network connects between the first and the second transconductance cells.
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公开(公告)号:US10566896B2
公开(公告)日:2020-02-18
申请号:US16055792
申请日:2018-08-06
Applicant: RAYTHEON COMPANY
Inventor: Boris S. Jacobson , Steven D. Bernstein , Steven M. Lardizabal , Jason Adams , Jeffrey R. Laroche
Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.
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公开(公告)号:US20230208364A1
公开(公告)日:2023-06-29
申请号:US17646162
申请日:2021-12-28
Applicant: Raytheon Company
Inventor: John P. Bettencourt , Valery S. Kaper , Steven M. Lardizabal
IPC: H03F3/193
CPC classification number: H03F3/193 , H03F2200/451
Abstract: Methods and apparatus for an amplifier including first and second transistors coupled in a stacked configuration with first and second current mirrors to provide respective bias signals to the amplifier transistors. A reference transistor is coupled to the first and second current mirrors for referencing the bias signals together.
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公开(公告)号:US11205953B2
公开(公告)日:2021-12-21
申请号:US16741318
申请日:2020-01-13
Applicant: RAYTHEON COMPANY
Inventor: Boris S. Jacobson , Steven D. Bernstein , Steven M. Lardizabal , Jason Adams , Jeffrey R. Laroche
Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.
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6.
公开(公告)号:US20190081567A1
公开(公告)日:2019-03-14
申请号:US15703455
申请日:2017-09-13
Applicant: Raytheon Company
Inventor: Boris S. Jacobson , Steven D. Bernstein , Steven M. Lardizabal , Jason Adams , Jeffrey R. Laroche
CPC classification number: H02M7/003 , H01F27/28 , H01F27/2804 , H01F27/362 , H01F27/42 , H01F2027/2809 , H02M3/335 , H02M7/04 , H02M2001/007 , H02M2001/008
Abstract: A modular high-power converter system includes an electronic power distribution unit configured to output an analog current (AC) voltage to a power bus, and at least one Transmit or Receive Integrated Microwave Module (T/RIMM) that includes a voltage converter unit and a transmitter and receiver (T/R) unit. The voltage converter unit includes at least one analog-to-digital converter (ADC) to convert the AC voltage into a direct current (DC) voltage having a first DC voltage level. The transmitter and receiver (T/R) unit includes a modular-based DC/DC converter to convert the DC voltage into a second DC voltage having a second voltage. The modular-based DC/DC converter includes a modular power converter unit configured to generate the second DC voltage. The modular converter unit is configured to be independently interchangeable with a different modular converter unit.
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公开(公告)号:US20210273558A1
公开(公告)日:2021-09-02
申请号:US16741318
申请日:2020-01-13
Applicant: RAYTHEON COMPANY
Inventor: Boris S. Jacobson , Steven D. Bernstein , Steven M. Lardizabal , Jason Adams , Jeffrey R. Laroche
Abstract: A power converter assembly is provided and includes high quality factor (Q) shield-to-transistor integrated low-inductance capacitor elements to divert common mode (CM) currents, high Q shield-to-shield integrated low-inductance capacitor elements to compliment line-to-line filter capacitors and high Q baseplate integrated low-inductance capacitor elements to attenuate residual CM currents.
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公开(公告)号:US10447208B2
公开(公告)日:2019-10-15
申请号:US15843922
申请日:2017-12-15
Applicant: Raytheon Company
Inventor: John P. Bettencourt , Valery S. Kaper , Steven M. Lardizabal
Abstract: A circuit having (A) a transistor; (B) a bias circuit for providing setting a bias current for the transistor, the bias current having a current level in accordance with a reference current fed to the bias circuit; and (C) a bias current level controller, comprising: (i) a plurality of switches, each one of the switches comprises: a MOS FET and a GaN FET connected in a cascode configuration; and (ii) current source circuitry, comprising a plurality of current sources, each one of the current sources being connected between a voltage source and a corresponding one of the plurality of switches, the current source circuit combining currents produced by the current source in response a binary control signal fed to a gate of the MOS FET, the combined current providing the reference current fed to the bias circuit.
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公开(公告)号:US10340812B2
公开(公告)日:2019-07-02
申请号:US15703455
申请日:2017-09-13
Applicant: Raytheon Company
Inventor: Boris S. Jacobson , Steven D. Bernstein , Steven M. Lardizabal , Jason Adams , Jeffrey R. Laroche
Abstract: A modular high-power converter system includes an electronic power distribution unit configured to output an analog current (AC) voltage to a power bus, and at least one Transmit or Receive Integrated Microwave Module (T/RIMM) that includes a voltage converter unit and a transmitter and receiver (T/R) unit. The voltage converter unit includes at least one analog-to-digital converter (ADC) to convert the AC voltage into a direct current (DC) voltage having a first DC voltage level. The transmitter and receiver (T/R) unit includes a modular-based DC/DC converter to convert the DC voltage into a second DC voltage having a second voltage. The modular-based DC/DC converter includes a modular power converter unit configured to generate the second DC voltage. The modular converter unit is configured to be independently interchangeable with a different modular converter unit.
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公开(公告)号:US20190190456A1
公开(公告)日:2019-06-20
申请号:US15843922
申请日:2017-12-15
Applicant: Raytheon Company
Inventor: John P. Bettencourt , Valery S. Kaper , Steven M. Lardizabal
CPC classification number: H03F1/0222 , H01L29/2003 , H03F1/223 , H03F1/306 , H03F3/193 , H03F3/345 , H03F2200/18 , H03F2200/451 , H03F2200/555 , H03M1/742
Abstract: A circuit having (A) a transistor, (B) a bias circuit for providing setting a bias current for the transistor, the bias current having a current level in accordance with a reference current fed to the bias circuit; and (C) a bias current level controller, comprising: (i) a plurality of switches, each one of the switches comprises: a MOS FET and a GaN FET connected in a cascode configuration; and (ii) current source circuitry, comprising a plurality of current sources, each one of the current sources being connected between a voltage source and a corresponding one of the plurality of switches, the current source circuit combining currents produced by the current source in response a binary control signal fed to a gate of the MOS FET, the combined current providing the reference current fed to the bias circuit.
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