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    Photonic IC chip
    1.
    发明授权
    Photonic IC chip 有权

    公开(公告)号：US11269141B2

    公开(公告)日：2022-03-08

    申请号：US16821370

    申请日：2020-03-17

    Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Crolles 2) SAS

    Inventor： Frédéric Boeuf ,  Luca Maggi

    IPC: G02B6/124 ,  G02B6/34 ,  G02B6/43 ,  G02B6/30 ,  G02B6/12 ,  G02B6/136

    Abstract: A photonic integrated circuit chip includes vertical grating couplers defined in a first layer. Second insulating layers overlie the vertical grating coupler and an interconnection structure with metal levels is embedded in the second insulating layers. A cavity extends in depth through the second insulating layers all the way to an intermediate level between the couplers and the metal level closest to the couplers. The cavity has lateral dimensions such that the cavity is capable of receiving a block for holding an array of optical fibers intended to be optically coupled to the couplers.

    PHOTONIC IC CHIP
    2.
    发明申请
    PHOTONIC IC CHIP 审中-公开

    公开(公告)号：US20200310027A1

    公开(公告)日：2020-10-01

    申请号：US16821370

    申请日：2020-03-17

    Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Crolles 2) SAS

    Inventor： Frédéric Boeuf ,  Luca Maggi

    IPC: G02B6/124 ,  G02B6/34 ,  G02B6/43

    Abstract: A photonic integrated circuit chip includes vertical grating couplers defined in a first layer. Second insulating layers overlie the vertical grating coupler and an interconnection structure with metal levels is embedded in the second insulating layers. A cavity extends in depth through the second insulating layers all the way to an intermediate level between the couplers and the metal level closest to the couplers. The cavity has lateral dimensions such that the cavity is capable of receiving a block for holding an array of optical fibers intended to be optically coupled to the couplers.

    Photonic IC chip
    4.
    发明授权
    Photonic IC chip 有权

    公开(公告)号：US11609378B2

    公开(公告)日：2023-03-21

    申请号：US17649520

    申请日：2022-01-31

    Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Crolles 2) SAS

    Inventor： Frédéric Boeuf ,  Luca Maggi

    IPC: G02B6/124 ,  G02B6/34 ,  G02B6/43 ,  G02B6/30 ,  G02B6/12 ,  G02B6/136

    Abstract: A photonic integrated circuit chip includes vertical grating couplers defined in a first layer. Second insulating layers overlie the vertical grating coupler and an interconnection structure with metal levels is embedded in the second insulating layers. A cavity extends in depth through the second insulating layers all the way to an intermediate level between the couplers and the metal level closest to the couplers. The cavity has lateral dimensions such that the cavity is capable of receiving a block for holding an array of optical fibers intended to be optically coupled to the couplers.

    PHOTONIC IC CHIP
    5.
    发明申请
    PHOTONIC IC CHIP 有权

    公开(公告)号：US20220155519A1

    公开(公告)日：2022-05-19

    申请号：US17649520

    申请日：2022-01-31

    Applicant: STMicroelectronics S.r.I. ,  STMicroelectronics (Crolles 2) SAS

    Inventor： Frédéric Boeuf ,  Luca Maggi

    IPC: G02B6/124 ,  G02B6/34 ,  G02B6/43 ,  G02B6/30 ,  G02B6/12 ,  G02B6/136

    Abstract: A photonic integrated circuit chip includes vertical grating couplers defined in a first layer. Second insulating layers overlie the vertical grating coupler and an interconnection structure with metal levels is embedded in the second insulating layers. A cavity extends in depth through the second insulating layers all the way to an intermediate level between the couplers and the metal level closest to the couplers. The cavity has lateral dimensions such that the cavity is capable of receiving a block for holding an array of optical fibers intended to be optically coupled to the couplers.

    Photonic wafer level testing systems, devices, and methods of operation
    6.
    发明授权
    Photonic wafer level testing systems, devices, and methods of operation 有权

    公开(公告)号：US12216020B2

    公开(公告)日：2025-02-04

    申请号：US17318831

    申请日：2021-05-12

    Applicant: STMicroelectronics S.r.l.

    Inventor： Marco Piazza ,  Antonio Canciamilla ,  Piero Orlandi ,  Luca Maggi

    IPC: G01M11/00 ,  G01M11/02 ,  G01R31/317 ,  G01R31/3185 ,  G02B6/293

    Abstract: A method of testing a photonic device includes providing a plurality of optical test signals at respective inputs of a first plurality of inputs of an optical input circuit located on a substrate, combining the plurality of optical test signals into a combined optical test signal at an output of the optical input circuit, transmitting the combined optical test signal through the output to an input waveguide of an optical device under test, the optical device under test being located on the substrate, and measuring a response of the optical device under test to the combined optical test signal. Each of the plurality of optical test signals comprises a respective dominant wavelength of a plurality of dominant wavelengths.

    Optical integrated circuit systems, devices, and methods of fabrication
    8.
    发明授权
    Optical integrated circuit systems, devices, and methods of fabrication 有权

    公开(公告)号：US10262984B1

    公开(公告)日：2019-04-16

    申请号：US16028263

    申请日：2018-07-05

    Applicant: STMicroelectronics S.r.l.

    Inventor： Luca Maggi ,  Piero Orlandi

    IPC: H01L23/60 ,  G02B6/13 ,  H01L27/02 ,  H02H9/04 ,  G02B6/122 ,  G02B6/12

    Abstract: An optical integrated circuit device includes an electrically insulating substrate, an optical connection disposed at a boundary of the optical integrated circuit, and a first electrostatic discharge (ESD) protection structure in direct contact with and electrically coupled to the first waveguide. The optical connection includes a first waveguide. The first waveguide is disposed on the electrically insulating substrate and configured to transmit an optical signal. The first ESD protection structure is both electrically non-insulating and substantially optically transparent to the optical signal. An ESD diode including an anode and a cathode is electrically coupled to the first ESD protection structure. A ground connection is electrically coupled to the anode of the ESD diode.

    PHOTONIC WAFER LEVEL TESTING SYSTEMS, DEVICES, AND METHODS OF OPERATION
    10.
    发明申请
    PHOTONIC WAFER LEVEL TESTING SYSTEMS, DEVICES, AND METHODS OF OPERATION 有权

    公开(公告)号：US20250116570A1

    公开(公告)日：2025-04-10

    申请号：US18988238

    申请日：2024-12-19

    Applicant: STMicroelectronics S.r.l.

    Inventor： Marco Piazza ,  Antonio Canciamilla ,  Piero Orlandi ,  Luca Maggi

    IPC: G01M11/00 ,  G01M11/02 ,  G01R31/317 ,  G01R31/3185 ,  G02B6/293

    Abstract: A method of testing a photonic device includes providing a plurality of optical test signals at respective inputs of a first plurality of inputs of an optical input circuit located on a substrate, combining the plurality of optical test signals into a combined optical test signal at an output of the optical input circuit, transmitting the combined optical test signal through the output to an input waveguide of an optical device under test, the optical device under test being located on the substrate, and measuring a response of the optical device under test to the combined optical test signal. Each of the plurality of optical test signals comprises a respective dominant wavelength of a plurality of dominant wavelengths.

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