EUV EXPOSURE APPARATUS, AND OVERLAY CORRECTION METHOD AND SEMICONDUCTOR DEVICE FABRICATING METHOD USING THE SAME

    公开(公告)号:US20210397079A1

    公开(公告)日:2021-12-23

    申请号:US17464826

    申请日:2021-09-02

    Abstract: Provided are an extreme ultraviolet (EUV) exposure apparatus for improving an overlay error in a EUV exposure process, and an overlay correction method and a semiconductor device fabricating method using the exposure apparatus. The EUV exposure apparatus includes an EUV light source; a first optical system configured to emit EUV light from the EUV light source to an EUV mask; a second optical system configured to emit EUV light reflected from the EUV mask to a wafer; a mask stage; a wafer stage; and a control unit configured to control the mask stage and the wafer stage, wherein, based on a correlation between a first overlay parameter, which is one of parameters of overlay errors between layers on the wafer, and a second overlay parameter, which is another parameter, the first overlay parameter is corrected through correction of the second overlay parameter.

    RECONFIGURABLE INTELLIGENT SURFACE FORMING MULTIPLE RESONANCES

    公开(公告)号:US20240007176A1

    公开(公告)日:2024-01-04

    申请号:US18154604

    申请日:2023-01-13

    CPC classification number: H04B7/15528 H04B7/026 H01Q15/148

    Abstract: The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). A unit cell of a RIS includes a first conductive structure including a first element and a second element disposed under the first element; a second conductive structure including a third element and a fourth element disposed under the third element; and a switch circuit disposed between the first conductive structure and the second conductive structure. As a first RF signal from a first external device is incident on the unit cell, a second RF signal having a first resonance frequency is reflected based on electrical paths formed respectively in the first element and the third element, and a third RF signal having a second resonance frequency different from the first resonance frequency is reflected based on electrical paths formed respectively in the second element and the fourth element.

    ELECTRONIC DEVICE COMPRISING ANTENNA MODULE

    公开(公告)号:US20250007166A1

    公开(公告)日:2025-01-02

    申请号:US18708975

    申请日:2022-11-14

    Abstract: The present disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate than a 4G communication system such as LTE. An electronic device comprising an antenna module, according to an embodiment of the present disclosure, comprises: a communication module for communicating with an external electronic device; a first antenna module including a plurality of first antenna cells and first dummy cells surrounding the plurality of first antenna cells; and a controller for controlling the communication module and the first antenna module. Each of the plurality of first antenna cells may be configured to have a first size, and each of the first dummy cells may be configured to have a second size smaller than the first size.

    METHOD OF CONTROLLING SEMICONDUCTOR PROCESS AND SEMICONDUCTOR PROCESSING APPARATUS

    公开(公告)号:US20240152046A1

    公开(公告)日:2024-05-09

    申请号:US18218246

    申请日:2023-07-05

    CPC classification number: G03F1/70 G03F7/2004 G03F7/70033 G03F7/70558

    Abstract: A method of controlling semiconductor process includes forming a plurality of sample overlay keys by irradiating a first dose of extreme ultraviolet (EUV) light to a first photoresist layer formed on at least one sample wafer; determining a sample correction parameter for correcting a sample overlay error measured from the plurality of sample overlay keys; updating the sample correction parameter based on a difference between the first dose and a second dose; forming a plurality of main overlay keys by irradiating a second dose of extreme ultraviolet light to a second photoresist layer formed on the sample wafer based on the updated sample correction parameter; determining the main correction parameter based on a main overlay error measured from the plurality of main overlay keys; and performing a photolithography process on a wafer different from the sample wafer based on the main correction parameter.

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