公开(公告)号：US20240063070A1

公开(公告)日：2024-02-22

申请号：US18231363

申请日：2023-08-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngchan Ko ,  Byungho Kim ,  Yongkoon Lee

IPC: H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L21/56

CPC classification number: H01L23/3121 ,  H01L24/16 ,  H01L25/0657 ,  H01L21/565 ,  H01L2224/16225 ,  H01L2225/06541 ,  H01L2924/3511

Abstract: A method of manufacturing a semiconductor package, the method including forming a first solder ball on a surface of a redistribution layer, forming a preliminary molding layer on the surface of the redistribution layer and the first solder ball, exposing the first solder ball by grinding the preliminary molding layer and the first solder ball, and forming a second solder ball by reflowing the first solder ball, wherein the second solder ball is spaced apart from the molding layer, in a horizontal direction.

公开(公告)号：US11637079B2

公开(公告)日：2023-04-25

申请号：US17206252

申请日：2021-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongkoon Lee ,  Jingu Kim ,  Sangkyu Lee ,  Seokkyu Choi

IPC: H01L23/66 ,  H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01Q9/04 ,  H01Q19/00 ,  H01L23/31

Abstract: A semiconductor package includes a supporting wiring structure including a first redistribution dielectric layer and a first redistribution conductive structure; a frame on the supporting wiring structure, having a mounting space and a through hole, and including a conductive material; a semiconductor chip in the mounting space and electrically connected to the first redistribution conductive structure; a cover wiring structure on the frame and the semiconductor chip and including a second redistribution dielectric layer and a second redistribution conductive structure; an antenna structure on the cover wiring structure; a connection structure extending in the through hole and electrically connecting the first redistribution conductive structure to the second redistribution conductive structure; and a dielectric filling member between the connection structure in the through hole and the frame and surrounding the semiconductor chip, the frame, and the connection structure.

公开(公告)号：US11562939B2

公开(公告)日：2023-01-24

申请号：US17235502

申请日：2021-04-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jingu Kim ,  Sangkyu Lee ,  Yongkoon Lee ,  Seokkyu Choi

IPC: H01L23/367 ,  H01L23/31 ,  H01L23/538 ,  H01L25/10 ,  H01L23/00

Abstract: A semiconductor package includes a connection layer, a semiconductor chip disposed at a center portion of the connection layer, an adhesive layer disposed on the semiconductor chip, a heat spreader layer disposed on the adhesive layer, and a lower redistribution layer disposed on the connection layer and a bottom surface of the semiconductor chip. A width of the adhesive layer is the same as a width of the semiconductor chip, and a width of the heat spreader layer is less than the width of the adhesive layer.

公开(公告)号：US11329014B2

公开(公告)日：2022-05-10

申请号：US16703279

申请日：2019-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Changbae Lee ,  Bongju Cho ,  Younggwan Ko ,  Yongkoon Lee ,  Moonil Kim ,  Youngchan Ko

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L23/522

Abstract: A semiconductor package includes: a connection structure including one or more redistribution layers; a core structure disposed on a surface of the connection structure; a semiconductor chip disposed on the surface and including connection pads electrically connected to the redistribution layers of the connection structure; a first encapsulant disposed on the surface and covering at least a portion of each of the core structure and the semiconductor chip; an antenna substrate disposed on the first encapsulant and including one or more wiring layers, at least a portion of the wiring layers including an antenna pattern; and a through via penetrating at least a portion of each of the connection structure, the core structure, the first encapsulant, and the antenna substrate.

公开(公告)号：US12183694B2

公开(公告)日：2024-12-31

申请号：US18125989

申请日：2023-03-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongkoon Lee ,  Jingu Kim ,  Sangkyu Lee ,  Seokkyu Choi

IPC: H01L23/66 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01Q9/04 ,  H01Q19/00

Abstract: A semiconductor package includes a supporting wiring structure including a first redistribution dielectric layer and a first redistribution conductive structure; a frame on the supporting wiring structure, having a mounting space and a through hole, and including a conductive material; a semiconductor chip in the mounting space and electrically connected to the first redistribution conductive structure; a cover wiring structure on the frame and the semiconductor chip and including a second redistribution dielectric layer and a second redistribution conductive structure; an antenna structure on the cover wiring structure; a connection structure extending in the through hole and electrically connecting the first redistribution conductive structure to the second redistribution conductive structure; and a dielectric filling member between the connection structure in the through hole and the frame and surrounding the semiconductor chip, the frame, and the connection structure.

公开(公告)号：US20240021531A1

公开(公告)日：2024-01-18

申请号：US18191212

申请日：2023-03-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongkoon Lee ,  Youngchan Ko ,  Byungho Kim

IPC: H01L23/538 ,  H01L23/498 ,  H10B80/00

CPC classification number: H01L23/5386 ,  H01L23/5383 ,  H01L23/5381 ,  H01L23/49816 ,  H10B80/00 ,  H01L2224/16227 ,  H01L24/16

Abstract: A semiconductor package includes a substrate including a first redistribution member including a first surface and a second surface, and including a first redistribution layer, an interconnection chip below the second surface and including an interconnection circuit electrically connected to the first redistribution layer, a via structure around the interconnection chip and electrically connected to the first redistribution layer, an encapsulant between the second surface and the interconnection chip and the via structure, a first pillar extending through the encapsulant to electrically connect the first redistribution layer and the interconnection circuit, a second pillar extending through the encapsulant to electrically connect the first redistribution layer and the via structure, and connection bumps below the interconnection chip and the via structure, and first and second chip structures on the first surface of the first redistribution member and electrically connected to the first redistribution layer. The first pillar and the second pillar have different shapes.

公开(公告)号：US20240014197A1

公开(公告)日：2024-01-11

申请号：US18298702

申请日：2023-04-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongkoon Lee ,  Youngchan Ko ,  Byungho Kim

IPC: H01L25/18 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498 ,  H01L21/768 ,  H10B80/00

CPC classification number: H01L25/18 ,  H01L23/3121 ,  H01L24/13 ,  H01L24/16 ,  H01L23/49827 ,  H01L23/49833 ,  H01L21/76871 ,  H10B80/00 ,  H01L24/11 ,  H01L2224/13025 ,  H01L2224/16227 ,  H01L2924/3511 ,  H01L2224/11436

Abstract: A semiconductor package includes: a substrate including a redistribution member having a first surface and a second surface, opposing each other, and including pad structures disposed on the first surface and a redistribution layer electrically connected to the pad structures, an interconnect chip disposed on the second surface of the redistribution member and including an interconnect circuit electrically connected to the redistribution layer, a via structure disposed around the interconnect chip and electrically connected to the redistribution layer, an encapsulant encapsulating at least a portion of each of the interconnect chip and the via structure, and bump structures disposed on the encapsulant; and a first chip structure and a second chip structure disposed on the first surface of the redistribution member and electrically connected to the pad structures.

公开(公告)号：US11569563B2

公开(公告)日：2023-01-31

申请号：US17205055

申请日：2021-03-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongkoon Lee ,  Jingu Kim ,  Sangkyu Lee

IPC: H01Q1/22 ,  H01L23/66 ,  H01L23/00

Abstract: A semiconductor package includes a redistribution wiring layer having redistribution wirings, a semiconductor chip on the redistribution wiring layer, a frame on the redistribution wiring layer, the frame surrounding the semiconductor chip, and the frame having core connection wirings electrically connected to the redistribution wirings, and an antenna structure on the frame, the antenna structure including a ground pattern layer, a first antenna insulation layer, a radiator pattern layer, a second antenna insulation layer, and a director pattern layer sequentially stacked on one another.

公开(公告)号：US12040248B2

公开(公告)日：2024-07-16

申请号：US18099663

申请日：2023-01-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jingu Kim ,  Sangkyu Lee ,  Yongkoon Lee ,  Seokkyu Choi

IPC: H01L23/367 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/10

CPC classification number: H01L23/367 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/20 ,  H01L25/105 ,  H01L2224/214 ,  H01L2225/1035 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1094

Abstract: A semiconductor package includes a connection layer, a semiconductor chip disposed at a center portion of the connection layer, an adhesive layer disposed on the semiconductor chip, a heat spreader layer disposed on the adhesive layer, and a lower redistribution layer disposed on the connection layer and a bottom surface of the semiconductor chip. A width of the adhesive layer is the same as a width of the semiconductor chip, and a width of the heat spreader layer is less than the width of the adhesive layer.

公开(公告)号：US11935849B2

公开(公告)日：2024-03-19

申请号：US18061763

申请日：2022-12-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam Kang ,  Sangkyu Lee ,  Yongkoon Lee

IPC: H01L23/66 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L23/552 ,  H01Q1/22 ,  H01Q1/52 ,  H01Q21/06

CPC classification number: H01L23/66 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01Q1/2283 ,  H01Q1/523 ,  H01Q1/526 ,  H01L2223/6677 ,  H01L2224/214 ,  H01L2924/19106 ,  H01L2924/3025 ,  H01Q21/065

Abstract: A semiconductor package includes a front redistribution structure having a first surface and a second surface, opposite to the first surface, a dielectric layer, an antenna substrate including a plurality of antenna members in the dielectric layer, a semiconductor chip having a connection pad connected to the plurality of antenna members, a conductive core structure having a first through-hole accommodating the antenna substrate and a second through-hole accommodating the semiconductor chip, and a rear redistribution structure including a conductive cover layer exposing an upper portion of the antenna substrate and covering an upper portion of the semiconductor chip, and a conductive via connecting the conductive cover layer to the conductive core structure.