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公开(公告)号:US10391608B2
公开(公告)日:2019-08-27
申请号:US15855839
申请日:2017-12-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Chen , Chia-Jung Hsu , Yi-An Lin
IPC: B24B37/30 , B24B37/10 , H01L21/67 , H01L21/02 , H01L21/321 , H01L21/673 , H01L21/683 , B24B37/04
Abstract: A wafer polishing apparatus is described herein. The wafer polishing apparatus includes a polish module configured to apply air pressure to a first surface of a wafer while performing a polishing process on a second surface of the wafer. In some implementations, the polish module is further configured to perform a cleaning process and/or a drying process on the second surface of the wafer, such that the same wafer polishing apparatus is configured to perform the polishing process, the cleaning process, and/or the drying process. In some implementations, the polishing module is further configured to air seal edges of the wafer during the polishing process, the cleaning process, and/or the drying process.
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公开(公告)号:US09865477B2
公开(公告)日:2018-01-09
申请号:US15052310
申请日:2016-02-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Chen , Chia-Jung Hsu , Yi-An Lin
IPC: H01L21/321 , H01L21/02 , H01L21/683 , H01L21/673
CPC classification number: H01L21/32115 , B24B37/00 , H01L21/02013 , H01L21/02016 , H01L21/02054 , H01L21/0209 , H01L21/3212 , H01L21/673 , H01L21/683
Abstract: The present disclosure provides a semiconductor fabrication apparatus in accordance with one embodiment. The apparatus includes a wafer stage that is operable to secure and rotate a wafer; a polish head configured to polish a backside surface of the wafer; an air bearing module configured to apply an air pressure to a front surface of the wafer; and an edge sealing unit configured to seal edges of the wafer.
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公开(公告)号:US10201887B2
公开(公告)日:2019-02-12
申请号:US15473967
申请日:2017-03-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Chen , Kei-Wei Chen
IPC: B24B37/26 , B24B37/22 , B24B37/04 , H01L21/67 , H01L21/683
Abstract: A polishing pad is provided. The polishing pad includes a base layer, a top layer, and multiple grooves. The top layer is located over the base layer and has a polishing surface and a bottom surface opposite to each other. The bottom surface is connected to the base layer. The grooves are formed on the bottom surface of the top layer.
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公开(公告)号:US11145751B2
公开(公告)日:2021-10-12
申请号:US15939389
申请日:2018-03-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kuo-Ju Chen , Su-Hao Liu , Chun-Hao Kung , Liang-Yin Chen , Huicheng Chang , Kei-Wei Chen , Hui-Chi Huang , Kao-Feng Liao , Chih-Hung Chen , Jie-Huang Huang , Lun-Kuang Tan , Wei-Ming You
IPC: H01L29/66 , H01L29/417 , H01L29/78
Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a source/drain structure, a dielectric layer, a contact plug. The gate structure is positioned over a fin structure. The source/drain structure is positioned in the fin structure and adjacent to the gate structure. The dielectric layer is positioned over the gate structure and the source/drain structure. The contact plug is positioned passing through the dielectric layer. The contact plug includes a first metal compound including one of group III elements, group IV elements, group V elements or a combination thereof.
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公开(公告)号:US10058974B1
公开(公告)日:2018-08-28
申请号:US15475269
申请日:2017-03-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Chen , Kei-Wei Chen , Ying-Lang Wang
IPC: H01L21/302 , B24B37/013 , B24B37/04 , B24B49/16 , H01L21/306 , H01L21/321
CPC classification number: B24B37/013 , B24B37/042 , B24B37/107 , B24B49/16
Abstract: A method for performing a CMP process is provided. The method includes performing the CMP process. The method further includes during the CMP process detecting a motion of a carrier head about a rotation axis beside a polishing pad. The method also includes producing a control signal corresponding to a detected result of the motion. In addition, the method includes prohibiting the rotation of the carrier head about a rotation axis by a driving motor which is controlled by the control signal. And, the method includes selecting a point of time at which the CMP process is terminated after the control signal is substantially the same as a threshold value.
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公开(公告)号:US20180138052A1
公开(公告)日:2018-05-17
申请号:US15855839
申请日:2017-12-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Chen , Chia-Jung Hsu , Yi-An Lin
IPC: H01L21/321 , H01L21/683 , H01L21/673 , H01L21/02
CPC classification number: B24B37/30 , B24B37/04 , B24B37/10 , H01L21/02013 , H01L21/02016 , H01L21/0209 , H01L21/32115 , H01L21/3212 , H01L21/67046 , H01L21/67092 , H01L21/67219 , H01L21/673 , H01L21/683
Abstract: A wafer polishing apparatus is described herein. The wafer polishing apparatus includes a polish module configured to apply air pressure to a first surface of a wafer while performing a polishing process on a second surface of the wafer. In some implementations, the polish module is further configured to perform a cleaning process and/or a drying process on the second surface of the wafer, such that the same wafer polishing apparatus is configured to perform the polishing process, the cleaning process, and/or the drying process. In some implementations, the polishing module is further configured to air seal edges of the wafer during the polishing process, the cleaning process, and/or the drying process.
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公开(公告)号:US20170243733A1
公开(公告)日:2017-08-24
申请号:US15052310
申请日:2016-02-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Chen , Chia-Jung Hsu , Yi-An Lin
IPC: H01L21/02
CPC classification number: H01L21/32115 , B24B37/00 , H01L21/02013 , H01L21/02016 , H01L21/02054 , H01L21/0209 , H01L21/3212 , H01L21/673 , H01L21/683
Abstract: The present disclosure provides a semiconductor fabrication apparatus in accordance with one embodiment. The apparatus includes a wafer stage that is operable to secure and rotate a wafer; a polish head configured to polish a backside surface of the wafer; an air bearing module configured to apply an air pressure to a front surface of the wafer; and an edge sealing unit configured to seal edges of the wafer.
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