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公开(公告)号：US11742386B2
公开(公告)日：2023-08-29
申请号：US17872452
申请日：2022-07-25
发明人： Su-Hao Liu , Huicheng Chang , Chia-Cheng Chen , Liang-Yin Chen , Kuo-Ju Chen , Chun-Hung Wu , Chang-Miao Liu , Huai-Tei Yang , Lun-Kuang Tan , Wei-Ming You
IPC分类号： H01L21/8234 , H01L29/08 , H01L29/167 , H01L29/78 , H01L21/02 , H01L21/285 , H01L29/66 , H01L21/265 , H01L29/417
CPC分类号： H01L29/0847 , H01L21/0257 , H01L21/02532 , H01L21/26513 , H01L21/28518 , H01L29/167 , H01L29/41791 , H01L29/665 , H01L29/66795 , H01L29/785 , H01L29/7848
摘要： The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.
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公开(公告)号：US11145751B2
公开(公告)日：2021-10-12
申请号：US15939389
申请日：2018-03-29
发明人： Kuo-Ju Chen , Su-Hao Liu , Chun-Hao Kung , Liang-Yin Chen , Huicheng Chang , Kei-Wei Chen , Hui-Chi Huang , Kao-Feng Liao , Chih-Hung Chen , Jie-Huang Huang , Lun-Kuang Tan , Wei-Ming You
IPC分类号： H01L29/66 , H01L29/417 , H01L29/78
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a source/drain structure, a dielectric layer, a contact plug. The gate structure is positioned over a fin structure. The source/drain structure is positioned in the fin structure and adjacent to the gate structure. The dielectric layer is positioned over the gate structure and the source/drain structure. The contact plug is positioned passing through the dielectric layer. The contact plug includes a first metal compound including one of group III elements, group IV elements, group V elements or a combination thereof.
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公开(公告)号：US09577102B1
公开(公告)日：2017-02-21
申请号：US14865663
申请日：2015-09-25
发明人： Yu-Ting Hsiao , Cheng-Ta Wu , Lun-Kuang Tan , Liang-Yu Yen , Ting-Chun Wang , Tsung-Han Wu , Wei-Ming You
IPC分类号： H01L21/28 , H01L29/78 , H01L29/66 , H01L21/3215 , H01L29/06
CPC分类号： H01L29/7856 , H01L21/3215 , H01L23/535 , H01L29/0649 , H01L29/41791 , H01L29/42376 , H01L29/66545 , H01L29/66795 , H01L29/7851
摘要： A method of forming a gate includes: forming a dummy gate; forming an inter layer dielectric (ILD) laterally adjacent to the dummy gate; doping a dopant into the dummy gate and the ILD, in which a surface dopant concentration of the dummy gate is lower than a surface dopant concentration of the ILD; removing the dummy gate to form a cavity after doping the dopant into the dummy gate and the ILD; and forming the gate in the cavity.
摘要翻译： 一种形成栅极的方法包括：形成一个虚拟栅极; 形成横向邻近所述虚拟栅极的层间电介质（ILD）; 将掺杂剂掺杂到伪栅极和ILD中，其中伪栅极的表面掺杂剂浓度低于ILD的表面掺杂剂浓度; 在将掺杂剂掺杂到虚拟栅极和ILD中之后去除伪栅极以形成空腔; 并在腔中形成门。
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公开(公告)号：US11450741B2
公开(公告)日：2022-09-20
申请号：US17201041
申请日：2021-03-15
发明人： Su-Hao Liu , Huicheng Chang , Chia-Cheng Chen , Liang-Yin Chen , Kuo-Ju Chen , Chun-Hung Wu , Chang-Miao Liu , Huai-Tei Yang , Lun-Kuang Tan , Wei-Ming You
IPC分类号： H01L21/8234 , H01L29/08 , H01L29/167 , H01L29/78 , H01L21/02 , H01L21/285 , H01L29/66 , H01L21/265 , H01L29/417
摘要： The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.
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公开(公告)号：US11018022B2
公开(公告)日：2021-05-25
申请号：US16035159
申请日：2018-07-13
发明人： I-Ming Chang , Chih-Cheng Lin , Chi-Ying Wu , Wei-Ming You , Ziwei Fang , Huang-Lin Chao
IPC分类号： H01L21/335 , H01L21/8232 , H01L21/425 , H01L21/322 , H01L21/28 , H01L29/78 , H01L21/762 , H01L29/165 , H01L29/66
摘要： A method for forming a semiconductor device structure is provided. The method includes depositing a gate dielectric layer over a substrate. The substrate has a base portion and a first fin portion over the base portion, and the gate dielectric layer is over the first fin portion. The method includes forming a gate electrode layer over the gate dielectric layer. The gate electrode layer includes fluorine. The method includes annealing the gate electrode layer and the gate dielectric layer so that fluorine from the gate electrode layer diffuses into the gate dielectric layer.
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公开(公告)号：US20190131399A1
公开(公告)日：2019-05-02
申请号：US15797703
申请日：2017-10-30
发明人： Su-Hao LIU , Huicheng CHANG , Chia-Cheng CHEN , Liang-Yin CHEN , Kuo-Ju CHEN , Chun-Hung WU , Chang-Miao Liu , Huai-Tei Yang , Lun-Kuang Tan , Wei-Ming You
IPC分类号： H01L29/08 , H01L29/167 , H01L29/78 , H01L21/265 , H01L21/285 , H01L29/66 , H01L21/02
CPC分类号： H01L29/0847 , H01L21/02532 , H01L21/0257 , H01L21/26513 , H01L21/28518 , H01L29/167 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.
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公开(公告)号：US10164095B2
公开(公告)日：2018-12-25
申请号：US14805450
申请日：2015-07-21
发明人： Cheng-Ta Wu , Ting-Chun Wang , Wei-Ming You , J. W. Wu
IPC分类号： H01L29/78 , H01L29/417 , H01L29/66 , H01L29/06 , H01L21/265 , H01L21/324
摘要： A method for manufacturing a semiconductor device is provided including forming one or more fins over a substrate and forming an isolation insulating layer over the one or more fins. A dopant is introduced into the isolation insulating layer. The isolation insulating layer containing the dopant is annealed, and a portion of the oxide layer is removed so as to expose a portion of the fins.
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公开(公告)号：US10062787B2
公开(公告)日：2018-08-28
申请号：US15415790
申请日：2017-01-25
发明人： Yu-Ting Hsiao , Cheng-Ta Wu , Lun-Kuang Tan , Liang-Yu Yen , Ting-Chun Wang , Tsung-Han Wu , Wei-Ming You
IPC分类号： H01L29/78 , H01L29/06 , H01L29/417 , H01L29/423 , H01L23/535 , H01L29/66 , H01L21/3215
CPC分类号： H01L29/7856 , H01L21/3215 , H01L23/535 , H01L29/0649 , H01L29/41791 , H01L29/42376 , H01L29/66545 , H01L29/66795 , H01L29/7851
摘要： A FinFET includes a fin structure, a gate, a source-drain region and an inter layer dielectric (ILD). The gate crosses over the fin structure. The source-drain region is in the fin structure. The ILD is laterally adjacent to the gate and includes a dopant, in which a dopant concentration of the ILD adjacent to the gate is lower than a dopant concentration of the ILD away from the gate.
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公开(公告)号：US20220367632A1
公开(公告)日：2022-11-17
申请号：US17872452
申请日：2022-07-25
发明人： Su-Hao Liu , Huicheng Chang , Chia-Cheng Chen , Liang-Yin Chen , Kuo-Ju Chen , Chun-Hung Wu , Chang-Miao Liu , Huai-Tei Yang , Lun-Kuang Tan , Wei-Ming You
IPC分类号： H01L29/08 , H01L29/167 , H01L29/78 , H01L21/02 , H01L21/285 , H01L29/66 , H01L21/265 , H01L29/417
摘要： The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.
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公开(公告)号：US20190288068A1
公开(公告)日：2019-09-19
申请号：US16433374
申请日：2019-06-06
发明人： Su-Hao Liu , Huicheng Chang , Chia-Cheng Chen , Liang-Yin Chen , Kuo-Ju Chen , Chun-Hung Wu , Chang-Maio Liu , Huai-Tei Yang , Lun-Kuang Tan , Wei-Ming You
IPC分类号： H01L29/08 , H01L21/265 , H01L21/02 , H01L29/66 , H01L29/167 , H01L29/78 , H01L21/285
摘要： The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.
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