公开(公告)号：US20210375667A1

公开(公告)日：2021-12-02

申请号：US17373339

申请日：2021-07-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Hsiang Lin ,  Keng-Chu Lin ,  Shwang-Ming Jeng ,  Teng-Chun Tsai ,  Tsu-Hsiu Perng ,  Fu-Ting Yen

IPC: H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234

Abstract: An embodiment method includes depositing a first dielectric film over and along sidewalls of a semiconductor fin, the semiconductor fin extending upwards from a semiconductor substrate. The method further includes depositing a dielectric material over the first dielectric film; recessing the first dielectric film below a top surface of the semiconductor fin to define a dummy fin, the dummy fin comprising an upper portion of the dielectric material; and forming a gate stack over and along sidewalls of the semiconductor fin and the dummy fin.

公开(公告)号：US10727065B2

公开(公告)日：2020-07-28

申请号：US16122235

申请日：2018-09-05

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Wei Su ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Teng-Chun Tsai

IPC: H01L21/28 ,  H01L21/3213 ,  H01L21/02 ,  H01L29/66 ,  H01L21/311 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/321 ,  H01L21/3205 ,  H01L21/32

Abstract: A method includes forming a gate stack and an interlayer dielectric (ILD) over a substrate, wherein the interlayer dielectric is adjacent to the gate stack; forming an inhibitor covering the interlayer dielectric such that the gate stack is exposed from the inhibitor; performing a deposition process to form a conductive layer over the gate stack until the conductive layer starts to form on the inhibitor, in which the deposition process has a deposition selectivity for the gate stack with respect to the inhibitor; and performing an etching process to remove a portion of the conductive layer over the inhibitor.

公开(公告)号：US11855214B2

公开(公告)日：2023-12-26

申请号：US17201673

申请日：2021-03-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Yun Peng ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Keng-Chu Lin ,  Tsu-Hsiu Perng

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/06

CPC classification number: H01L29/785 ,  H01L21/0217 ,  H01L21/02203 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66795 ,  H01L21/823468 ,  H01L29/0665 ,  H01L29/42392

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.

公开(公告)号：US11664268B2

公开(公告)日：2023-05-30

申请号：US17373339

申请日：2021-07-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Hsiang Lin ,  Keng-Chu Lin ,  Shwang-Ming Jeng ,  Teng-Chun Tsai ,  Tsu-Hsiu Perng ,  Fu-Ting Yen

IPC: H01L27/088 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234

CPC classification number: H01L21/76229 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0924 ,  H01L29/6681 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: An embodiment method includes depositing a first dielectric film over and along sidewalls of a semiconductor fin, the semiconductor fin extending upwards from a semiconductor substrate. The method further includes depositing a dielectric material over the first dielectric film; recessing the first dielectric film below a top surface of the semiconductor fin to define a dummy fin, the dummy fin comprising an upper portion of the dielectric material; and forming a gate stack over and along sidewalls of the semiconductor fin and the dummy fin.

公开(公告)号：US10950731B1

公开(公告)日：2021-03-16

申请号：US16572679

申请日：2019-09-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Yun Peng ,  Fu-Ting Yen ,  Ting-Ting Chen ,  Keng-Chu Lin ,  Tsu-Hsiu Perng

IPC: H01L21/8232 ,  H01L29/78 ,  H01L21/02 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/06

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.

公开(公告)号：US10741392B2

公开(公告)日：2020-08-11

申请号：US16037925

申请日：2018-07-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Wei Su ,  Fu-Ting Yen ,  Teng-Chun Tsai

IPC: H01L21/027 ,  H01L21/033 ,  H01L21/768 ,  H01L29/40 ,  H01L21/3105 ,  H01L21/3115 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/32

Abstract: A method includes forming a metal layer over a substrate; forming a dielectric layer over the metal layer; removing a first portion of the dielectric layer to expose a first portion of the metal layer, while a second portion of the dielectric layer remains on the metal layer; selectively forming a first inhibitor on the second portion of the dielectric layer, while the metal layer is free of coverage by the first inhibitor; and selectively depositing a first hard mask on the exposed first portion of the metal layer, while the first inhibitor is free of coverage by the first hard mask.

公开(公告)号：US12154822B2

公开(公告)日：2024-11-26

申请号：US18302428

申请日：2023-04-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Hsiang Lin ,  Keng-Chu Lin ,  Shwang-Ming Jeng ,  Teng-Chun Tsai ,  Tsu-Hsiu Perng ,  Fu-Ting Yen

IPC: H01L27/088 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78

Abstract: An embodiment method includes depositing a first dielectric film over and along sidewalls of a semiconductor fin, the semiconductor fin extending upwards from a semiconductor substrate. The method further includes depositing a dielectric material over the first dielectric film; recessing the first dielectric film below a top surface of the semiconductor fin to define a dummy fin, the dummy fin comprising an upper portion of the dielectric material; and forming a gate stack over and along sidewalls of the semiconductor fin and the dummy fin.

公开(公告)号：US20230387065A1

公开(公告)日：2023-11-30

申请号：US18447968

申请日：2023-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： De-Yang CHIOU ,  Yu-Yun Peng ,  Fu-Ting Yen ,  Keng-Chu Lin

IPC: H01L23/00 ,  H01L23/48 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L24/32 ,  H01L23/481 ,  H01L24/29 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2924/3512 ,  H01L2224/29188 ,  H01L2224/32145 ,  H01L2224/83013 ,  H01L2224/83896 ,  H01L2924/05442 ,  H01L2924/05042 ,  H01L2225/06541

Abstract: The present disclosure describes a semiconductor structure having bonded wafers with storage layers and a method to bond wafers with storage layers. The semiconductor structure includes a first wafer including a first storage layer with carbon, a second wafer including a second storage layer with carbon, and a bonding layer interposed between the first and second wafers and in contact with the first and second storage layers.

公开(公告)号：US20230253240A1

公开(公告)日：2023-08-10

申请号：US18302428

申请日：2023-04-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Hsiang Lin ,  Keng-Chu Lin ,  Shwang-Ming Jeng ,  Teng-Chun Tsai ,  Tsu-Hsiu Perng ,  Fu-Ting Yen

IPC: H01L21/762 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234

CPC classification number: H01L21/76229 ,  H01L21/823878 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/66795 ,  H01L29/66545 ,  H01L29/785 ,  H01L21/823892 ,  H01L29/6681 ,  H01L21/823431

Abstract: An embodiment method includes depositing a first dielectric film over and along sidewalls of a semiconductor fin, the semiconductor fin extending upwards from a semiconductor substrate. The method further includes depositing a dielectric material over the first dielectric film; recessing the first dielectric film below a top surface of the semiconductor fin to define a dummy fin, the dummy fin comprising an upper portion of the dielectric material; and forming a gate stack over and along sidewalls of the semiconductor fin and the dummy fin.

公开(公告)号：US11508583B2

公开(公告)日：2022-11-22

申请号：US17203306

申请日：2021-03-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yasutoshi Okuno ,  Teng-Chun Tsai ,  Ziwei Fang ,  Fu-Ting Yen

IPC: H01L21/28 ,  H01L29/66 ,  H01L29/49 ,  H01L29/78 ,  H01L29/51 ,  H01L21/8238

Abstract: A method includes removing a dummy gate stack to form an opening between gate spacers, selectively forming an inhibitor film on sidewalls of the gate spacers, with the sidewalls of the gate spacers facing the opening, and selectively forming a dielectric layer over a surface of a semiconductor region. The inhibitor film inhibits growth of the dielectric layer on the inhibitor film. The method further includes removing the inhibitor film, and forming a replacement gate electrode in a remaining portion of the opening.