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公开(公告)号：US09527721B2
公开(公告)日：2016-12-27
申请号：US14713243
申请日：2015-05-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Chao-Po Lu , Chung-Hsien Hun , Chih-Shan Chen , Chuan-Yi Ko , Chih-Yu Wang , Hsi-Cheng Hsu , Ji-Hong Chiang , Jui-Chun Weng , Wei-Ding Wu
CPC classification number: B81B3/0005 , B81B3/001 , B81B2201/0235 , B81B2207/012 , B81C1/00984 , B81C2203/0109 , B81C2203/0118 , B81C2203/035 , B81C2203/036 , B81C2203/0785 , B81C2203/0792 , H01L2224/81805 , H01L2924/1461 , H01L2924/16235
Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package with an anti-stiction layer, and an associated method of formation. In some embodiments, the MEMS package comprises a device substrate and a CMOS substrate. The device substrate comprises a MEMS device having a moveable or flexible part that is movable or flexible with respect to the device substrate. A surface of the moveable or flexible part is coated by a conformal anti-stiction layer made of polycrystalline silicon. A method for manufacturing the MEMS package is also provided.
Abstract translation: 本公开涉及具有抗静电层的微机电系统（MEMS）封装以及相关联的形成方法。 在一些实施例中，MEMS封装包括器件衬底和CMOS衬底。 器件衬底包括具有相对于器件衬底可移动或柔性的可移动或柔性部件的MEMS器件。 可移动或柔性部分的表面由多晶硅制成的共形抗静电层涂覆。 还提供了一种制造MEMS封装的方法。
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公开(公告)号：US20160332863A1
公开(公告)日：2016-11-17
申请号：US14713243
申请日：2015-05-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Chao-Po Lu , Chung-Hsien Hun , Chih-Shan Chen , Chuan-Yi Ko , Chih-Yu Wang , Hsi-Cheng Hsu , Ji-Hong Chiang , Jui-Chun Weng , Wei-Ding Wu
CPC classification number: B81B3/0005 , B81B3/001 , B81B2201/0235 , B81B2207/012 , B81C1/00984 , B81C2203/0109 , B81C2203/0118 , B81C2203/035 , B81C2203/036 , B81C2203/0785 , B81C2203/0792 , H01L2224/81805 , H01L2924/1461 , H01L2924/16235
Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package with an anti-stiction layer, and an associated method of formation. In some embodiments, the MEMS package comprises a device substrate and a CMOS substrate. The device substrate comprises a MEMS device having a moveable or flexible part that is movable or flexible with respect to the device substrate. A surface of the moveable or flexible part is coated by a conformal anti-stiction layer made of polycrystalline silicon. A method for manufacturing the MEMS package is also provided.
Abstract translation: 本公开涉及具有抗静电层的微机电系统（MEMS）封装以及相关联的形成方法。 在一些实施例中，MEMS封装包括器件衬底和CMOS衬底。 器件衬底包括具有相对于器件衬底可移动或柔性的可移动或柔性部件的MEMS器件。 可移动或柔性部分的表面由多晶硅制成的共形抗静电层涂覆。 还提供了一种制造MEMS封装的方法。
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公开(公告)号：US20190010047A1
公开(公告)日：2019-01-10
申请号：US16114521
申请日：2018-08-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Hsin-Yu Chen , Ji-Hong Chiang , Jui-Chun Weng , Wei-Ding Wu
CPC classification number: B81B7/0041 , B81B3/0081 , B81B2201/0235 , B81B2201/0242 , B81B2207/012 , B81B2207/07 , B81B2207/09 , B81C1/00293 , B81C2201/013 , B81C2203/0109 , B81C2203/0118 , B81C2203/037 , B81C2203/038 , B81C2203/0735 , H01L28/20
Abstract: The present disclosure relates to a micro-electromechanical system (MEMs) package. In some embodiments, the MEMs package has a plurality of conductive interconnect layers disposed within a dielectric structure over an upper surface of a first substrate. A heating element is electrically coupled to a semiconductor device within the first substrate by one or more of the plurality of conductive interconnect layers. The heating element is vertically separated from the first substrate by the dielectric structure. A MEMs substrate is coupled to the first substrate and has a MEMs device. A hermetically sealed chamber surrounding the MEMs device is disposed between the first substrate and the MEMs substrate. An out-gassing material is disposed laterally between the hermetically sealed chamber and the heating element.
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公开(公告)号：US20170203962A1
公开(公告)日：2017-07-20
申请号：US15182754
申请日：2016-06-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Hsi-Cheng Hsu , Hsin-Yu Chen , Ji-Hong Chiang , Jui-Chun Weng , Wei-Ding Wu , Yu-Jui Wu , Ching-Hsiang Hu , Ming-Tsung Chen
CPC classification number: B81C1/00285 , B81B7/0038 , B81B2201/0235 , B81B2201/0242 , B81B2207/012 , B81B2207/07 , B81C2203/0118 , B81C2203/0792
Abstract: The present disclosure relates to a MEMS package having an outgassing element configured to adjust a pressure within a hermetically sealed cavity by inducing outgassing of into the cavity, and an associated method. In some embodiments, the method is performed by forming an outgassing element within a passivation layer over a CMOS substrate and forming an outgassing resistive layer to cover the outgassing element. The outgassing resistive layer is removed from over the outgassing element, and the MEMS substrate is bonded to a front side of the CMOS substrate to enclose a first MEMS device within a first cavity and a second MEMS device within a second cavity. After removing the outgassing resistive layer, the outgassing element releases a gas into the second cavity to increase a second pressure of the second cavity to be greater than a first pressure of the first cavity.
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公开(公告)号：US09090452B2
公开(公告)日：2015-07-28
申请号：US14098974
申请日：2013-12-06
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
Inventor： Shyh-Wei Cheng , Jui-Chun Weng , Hsi-Cheng Hsu , Chih-Yu Wang , Chuan-Yi Ko , Ji-Hong Chiang , Chung-Hsien Hung , Hsin-Yu Chen , Chih-Hsien Chen , Yu-Mei Wu , Jong Chen
CPC classification number: B81B3/001 , B81B3/0005
Abstract: Embodiments of mechanisms for forming a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a substrate and a MEMS substrate disposed on the substrate. The MEMS substrate includes a movable element, a fixed element and at least a spring connected to the movable element and the fixed element. The MEMS device also includes a polysilicon layer on the movable element.
Abstract translation: 提供了用于形成微机电系统（MEMS）装置的机构的实施例。 MEMS器件包括设置在衬底上的衬底和MEMS衬底。 MEMS基板包括可移动元件，固定元件和连接到可移动元件和固定元件的至少一个弹簧。 MEMS器件还包括可移动元件上的多晶硅层。
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Patent Agency Ranking
公开(公告)号：US12092839B2
公开(公告)日：2024-09-17
申请号：US18222344
申请日：2023-07-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hsin-Yu Chen , Chun-Peng Li , Chia-Chun Hung , Ching-Hsiang Hu , Wei-Ding Wu , Jui-Chun Weng , Ji-Hong Chiang , Yen Chiang Liu , Jiun-Jie Chiou , Li-Yang Tu , Jia-Syuan Li , You-Cheng Jhang , Shin-Hua Chen , Lavanya Sanagavarapu , Han-Zong Pan , Hsi-Cheng Hsu
IPC: G02B27/30 , H01L27/146 , H01L31/0232
CPC classification number: G02B27/30 , H01L27/14625 , H01L31/02325
Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm−3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.
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公开(公告)号：US11782284B2
公开(公告)日：2023-10-10
申请号：US17883592
申请日：2022-08-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hsin-Yu Chen , Yen-Chiang Liu , Jiun-Jie Chiou , Jia-Syuan Li , You-Cheng Jhang , Shin-Hua Chen , Lavanya Sanagavarapu , Han-Zong Pan , Chun-Peng Li , Chia-Chun Hung , Ching-Hsiang Hu , Wei-Ding Wu , Jui-Chun Weng , Ji-Hong Chiang , Hsi-Cheng Hsu
IPC: G02B27/30 , G02B5/20 , H01L27/14 , G02B26/00 , H01L27/146 , H01L31/0216 , G06V40/13
CPC classification number: G02B27/30 , G02B5/20 , G02B26/007 , G06V40/1312 , H01L27/1462 , H01L27/14625 , H01L31/02162 , B32B2551/00 , G06V40/1318
Abstract: Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction.
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公开(公告)号：US20220382069A1
公开(公告)日：2022-12-01
申请号：US17883592
申请日：2022-08-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hsin-Yu CHEN , Yen-Chiang Liu , Jiun-Jie Chiou , Jia-Syuan Li , You-Cheng Jhang , Shin-Hua Chen , Lavanya Sanagavarapu , Han-Zong Pan , Chun-Peng Li , Chia-Chun Hung , Ching-Hsiang Hu , Wei-Ding Wu , Jui-Chun Weng , Ji-Hong Chiang , Hsi-Cheng Hsu
IPC: G02B27/30 , G02B5/20 , G02B26/00 , H01L27/146 , H01L31/0216 , G06V40/13
Abstract: Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, and wherein the conductive layer is formed over at least one of the following: the first surface of the first dielectric layer and a portion of sidewalls of each of the plurality of via holes, and wherein the conductive layer is configured so as to allow the optical collimator to filter light in a range of wavelengths.
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公开(公告)号：US11448891B2
公开(公告)日：2022-09-20
申请号：US16655763
申请日：2019-10-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hsin-Yu Chen , Chun-Peng Li , Chia-Chun Hung , Ching-Hsiang Hu , Wei-Ding Wu , Jui-Chun Weng , Ji-Hong Chiang , Yen-Chiang Liu , Jiun-Jie Chiou , Li-Yang Tu , Jia-Syuan Li , You-Cheng Jhang , Shin-Hua Chen , Lavanya Sanagavarapu , Han-Zong Pan , Hsi-Cheng Hsu
IPC: G02B27/30 , H01L27/146 , H01L31/0232
Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm−3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.
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公开(公告)号：US10532925B2
公开(公告)日：2020-01-14
申请号：US16114521
申请日：2018-08-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shyh-Wei Cheng , Chih-Yu Wang , Hsi-Cheng Hsu , Hsin-Yu Chen , Ji-Hong Chiang , Jui-Chun Weng , Wei-Ding Wu
Abstract: The present disclosure relates to a micro-electromechanical system (MEMs) package. In some embodiments, the MEMs package has a plurality of conductive interconnect layers disposed within a dielectric structure over an upper surface of a first substrate. A heating element is electrically coupled to a semiconductor device within the first substrate by one or more of the plurality of conductive interconnect layers. The heating element is vertically separated from the first substrate by the dielectric structure. A MEMs substrate is coupled to the first substrate and has a MEMs device. A hermetically sealed chamber surrounding the MEMs device is disposed between the first substrate and the MEMs substrate. An out-gassing material is disposed laterally between the hermetically sealed chamber and the heating element.
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