中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

11 records (took 0.017 seconds)

    Deep trench capacitor manufactured by streamlined process
    1.
    发明授权
    Deep trench capacitor manufactured by streamlined process 有权
    深沟槽电容器由流线型制造

    公开(公告)号：US09472690B2

    公开(公告)日：2016-10-18

    申请号：US14318870

    申请日：2014-06-30

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wu-An Weng ,  Chen-Chien Chang

    IPC: H01L29/94 ,  H01L29/66 ,  H01L23/00

    CPC classification number: H01L29/945 ,  H01L24/08 ,  H01L24/94 ,  H01L29/66181 ,  H01L2224/08146 ,  H01L2224/94 ,  H01L2924/1436 ,  H01L2224/80

    Abstract: The present disclosure provides a deep trench capacitor device. A first capacitor electrode is made up of a doped region of semiconductor substrate in which two or more trenches are arranged. A second capacitor electrode is made up of a continuous body of conductive material. The continuous body of conductive material includes a lower body portion filling the two or more trenches and an upper body portion extending continuously over the lower body portion. The upper body portion extends upwardly out of the trenches by a non-zero distance. A capacitor dielectric liner is arranged in the two or more trenches to separate the first and second capacitor electrodes. The capacitor dielectric liner extends continuously out of the two or more trenches along outer sidewalls of the upper body portion.

    Abstract translation: 本公开提供一种深沟槽电容器器件。 第一电容器电极由其中布置有两个或更多个沟槽的半导体衬底的掺杂区域构成。 第二电容器电极由导电材料的连续体组成。 导电材料的连续体包括填充两个或更多个沟槽的下主体部分和连续延伸穿过下主体部分的上主体部分。 上身部分向上延伸出沟槽外的非零距离。 电容器电介质衬垫布置在两个或更多个沟槽中以分离第一和第二电容器电极。 电容器电介质衬垫沿着上体部分的外侧壁连续延伸出两个或更多个沟槽。

    Streamlined Process for Vertical Semiconductor Devices
    2.
    发明申请
    Streamlined Process for Vertical Semiconductor Devices 有权
    垂直半导体器件的简化工艺

    公开(公告)号：US20140120690A1

    公开(公告)日：2014-05-01

    申请号：US13666193

    申请日：2012-11-01

    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    Inventor： Wu-An Weng ,  Chen-Chien Chang

    IPC: H01L49/02

    CPC classification number: H01L28/60 ,  H01L29/66181 ,  H01L29/945

    Abstract: The present disclosure provides a streamlined approach to forming vertically structured devices such as deep trench capacitors. Trenches and a contact plate bridging the trenches are formed using one lithographic process. A hard mask is formed over the substrate and etched through the mask to form two or more closely spaced trenches. The hard mask is then reduced by an isotropic etch process. The etch removes the hard mask preferentially between the trenches. Chemical mechanical polishing removes the conductive material down to the remaining hard mask layer, whereby conductive material remains in mask openings and forms a conductive bridge across the trenches.

    Abstract translation: 本公开提供了形成诸如深沟槽电容器的垂直结构的器件的流线型方法。 使用一个光刻工艺形成沟槽和桥接沟槽的接触板。 在衬底上形成硬掩模，并通过掩模蚀刻形成两个或更多个紧密间隔的沟槽。 然后通过各向同性蚀刻工艺来减小硬掩模。 蚀刻优先在沟槽之间去除硬掩模。 化学机械抛光将导电材料向下移动到剩余的硬掩模层，由此导电材料保留在掩模开口中并在沟槽之间形成导电桥。

    Self-aligned deep trench capacitor, and method for making the same
    3.
    发明授权
    Self-aligned deep trench capacitor, and method for making the same 有权
    自对准深沟槽电容器及其制造方法

    公开(公告)号：US09012296B2

    公开(公告)日：2015-04-21

    申请号：US13710537

    申请日：2012-12-11

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wu-An Weng ,  Chen-Chien Chang

    IPC: H01L21/20 ,  H01L49/02

    CPC classification number: H01L28/92

    Abstract: A method for forming a trench capacitor includes providing a substrate of a semiconductor material having a hard mask layer; etching the hard mask layer and the substrate to form at least one trench extending into the substrate; and performing pull-back etching on the hard mask layer. In the pull-back etching, a portion of the hard mask layer defining and adjacent to side walls of an opening of the at least one trench is removed. A resulting opening on the hard mask layer has a width dimension larger than a width dimension of an opening of the at least one trench extending into the substrate. The method further comprises doping the semiconductor material defining upper surfaces and sidewalls of the at least one trench to form a doped well region.

    Abstract translation: 形成沟槽电容器的方法包括提供具有硬掩模层的半导体材料的衬底; 蚀刻硬掩模层和衬底以形成延伸到衬底中的至少一个沟槽; 并对硬掩模层进行拉回蚀刻。 在拉回蚀刻中，去除限定并邻近至少一个沟槽的开口的侧壁的硬掩模层的一部分。 在硬掩模层上形成的开口的宽度尺寸大于延伸到衬底中的至少一个沟槽的开口的宽度尺寸。 该方法还包括掺杂限定至少一个沟槽的上表面和侧壁的半导体材料，以形成掺杂的阱区。

    Streamlined process for vertical semiconductor devices
    4.
    发明授权
    Streamlined process for vertical semiconductor devices 有权
    用于垂直半导体器件的简化工艺

    公开(公告)号：US08853048B2

    公开(公告)日：2014-10-07

    申请号：US13666193

    申请日：2012-11-01

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wu-An Weng ,  Chen-Chien Chang

    IPC: H01L21/8242 ,  H01L21/20 ,  H01L49/02 ,  H01L27/108 ,  H01L29/94

    CPC classification number: H01L28/60 ,  H01L29/66181 ,  H01L29/945

    Abstract: The present disclosure provides a streamlined approach to forming vertically structured devices such as deep trench capacitors. Trenches and a contact plate bridging the trenches are formed using one lithographic process. A hard mask is formed over the substrate and etched through the mask to form two or more closely spaced trenches. The hard mask is then reduced by an isotropic etch process. The etch removes the hard mask preferentially between the trenches. Chemical mechanical polishing removes the conductive material down to the remaining hard mask layer, whereby conductive material remains in mask openings and forms a conductive bridge across the trenches.

    Abstract translation: 本公开提供了形成诸如深沟槽电容器的垂直结构的器件的流线型方法。 使用一个光刻工艺形成沟槽和桥接沟槽的接触板。 在衬底上形成硬掩模，并通过掩模蚀刻形成两个或更多个紧密间隔的沟槽。 然后通过各向同性蚀刻工艺来减小硬掩模。 蚀刻优先在沟槽之间去除硬掩模。 化学机械抛光将导电材料向下移动到剩余的硬掩模层，由此导电材料保留在掩模开口中并在沟槽之间形成导电桥。

    DEEP TRENCH CAPACITOR MANUFACTURED BY STREAMLINED PROCESS
    7.
    发明申请
    DEEP TRENCH CAPACITOR MANUFACTURED BY STREAMLINED PROCESS 有权
    由流程制造的深层TRENCH电容器

    公开(公告)号：US20140327109A1

    公开(公告)日：2014-11-06

    申请号：US14318870

    申请日：2014-06-30

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Wu-An Weng ,  Chen-Chien Chang

    IPC: H01L49/02

    CPC classification number: H01L29/945 ,  H01L24/08 ,  H01L24/94 ,  H01L29/66181 ,  H01L2224/08146 ,  H01L2224/94 ,  H01L2924/1436 ,  H01L2224/80

    Abstract: The present disclosure provides a deep trench capacitor device. A first capacitor electrode is made up of a doped region of semiconductor substrate in which two or more trenches are arranged. A second capacitor electrode is made up of a continuous body of conductive material. The continuous body of conductive material includes a lower body portion filling the two or more trenches and an upper body portion extending continuously over the lower body portion. The upper body portion extends upwardly out of the trenches by a non-zero distance. A capacitor dielectric liner is arranged in the two or more trenches to separate the first and second capacitor electrodes. The capacitor dielectric liner extends continuously out of the two or more trenches along outer sidewalls of the upper body portion.

    Abstract translation: 本公开提供一种深沟槽电容器器件。 第一电容器电极由其中布置有两个或更多个沟槽的半导体衬底的掺杂区域构成。 第二电容器电极由导电材料的连续体组成。 导电材料的连续体包括填充两个或更多个沟槽的下主体部分和连续延伸穿过下主体部分的上主体部分。 上身部分向上延伸出沟槽外的非零距离。 电容器电介质衬垫布置在两个或更多个沟槽中以分离第一和第二电容器电极。 电容器电介质衬垫沿着上体部分的外侧壁连续延伸出两个或更多个沟槽。

Patent Agency Ranking