公开(公告)号：US20180205582A1

公开(公告)日：2018-07-19

申请号：US15870826

申请日：2018-01-12

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Sun Woo KONG ,  Bong Hyuk PARK ,  Moon Sik LEE ,  Hui Dong LEE

IPC分类号： H04L25/49 ,  H03F3/45 ,  H03F3/19

CPC分类号： H04L25/4906 ,  H03F3/19 ,  H03F3/195 ,  H03F3/2171 ,  H03F3/265 ,  H03F3/45179 ,  H03F2200/534 ,  H03F2203/45172

摘要： A data modulation apparatus may comprise a S2D conversion part including a first amplifier operating based on a carrier wave signal and two transformers receiving an output signal of the first amplifier; a first switch part transferring status of input data to the first amplifier based on the input data; a differential amplification part receiving output signals of the S2D conversion part and amplifying the output signals of the S2D conversion part; a D2S conversion part receiving output signals of the differential amplification part and performing modulation on the output signals by converting the output signals to a single signal; and a second switch part transferring the output signals of the differential amplification part to the D2S conversion part based on the input data. Here, the first switch part and the second switch part may be alternately turned on and off.

公开(公告)号：US20150280653A1

公开(公告)日：2015-10-01

申请号：US14350218

申请日：2012-10-04

申请人： Nujira Limited

发明人： Gerard Wimpenny

IPC分类号： H03F1/02 ,  H04M1/02 ,  H03F3/26 ,  H03F3/45 ,  H03F3/21 ,  H03F3/19

CPC分类号： H03F1/0233 ,  H03F1/0222 ,  H03F3/19 ,  H03F3/21 ,  H03F3/26 ,  H03F3/45076 ,  H03F2200/09 ,  H03F2200/102 ,  H03F2200/504 ,  H03F2203/45172 ,  H04M1/0202

摘要： There is disclosed a power amplifier arrangement comprising: first and second active devices for amplifying in-phase and anti-phase parts of an input signal; a first DC supply network connected between the output of the first active device and a modulated supply voltage; a second DC supply network connected between the output of the second active device and the same modulated supply voltage and an output combiner for combining the amplified in-phase and anti-phase parts of the input signal.

摘要翻译： 公开了一种功率放大器装置，包括：用于放大输入信号的同相和反相部分的第一和第二有源器件; 连接在第一有源器件的输出端和调制电源电压之间的第一DC供电网络; 连接在第二有源器件的输出端和相同的调制电源电压之间的第二DC供电网络和用于组合输入信号的放大的同相和反相部分的输出组合器。

公开(公告)号：US20070188226A1

公开(公告)日：2007-08-16

申请号：US11468383

申请日：2006-08-30

申请人： Alan Westwick ,  Timothy Dupuis ,  Susanne Paul

发明人： Alan Westwick ,  Timothy Dupuis ,  Susanne Paul

IPC分类号： H03F1/00

CPC分类号： H03F3/21 ,  H03F3/45475 ,  H03F2203/45172 ,  H03F2203/45621

摘要： A method and apparatus provides an input structure for a power amplifier. In one example, the input structure has an input network and a predriver circuit to provide an input signal to the power amplifier. The input network includes a transformer for helping to maintain a constant input impedance. The predriver includes a limiting amplifier that provides isolation between the power amplifier and the RF input. A DC feedback circuit is used by the predriver that maintains the DC level of the inverters to a desired level.

摘要翻译： 方法和装置提供功率放大器的输入结构。 在一个示例中，输入结构具有输入网络和预驱动电路，以向功率放大器提供输入信号。 输入网络包括用于帮助保持恒定输入阻抗的变压器。 预驱动器包括限幅放大器，可在功率放大器和RF输入之间提供隔离。 预驱动器使用DC反馈电路，将逆变器的直流电平维持在期望的水平。

公开(公告)号：US20190199290A1

公开(公告)日：2019-06-27

申请号：US15855106

申请日：2017-12-27

申请人： QUALCOMM Incorporated

发明人： Rahul KARMAKER ,  Bin Fan

IPC分类号： H03F1/02 ,  H03F3/193 ,  H03F3/45

CPC分类号： H03F1/0205 ,  H03F3/193 ,  H03F3/4521 ,  H03F3/45237 ,  H03F3/4565 ,  H03F2200/36 ,  H03F2200/411 ,  H03F2200/451 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2200/555 ,  H03F2203/45022 ,  H03F2203/45026 ,  H03F2203/45082 ,  H03F2203/45172 ,  H03F2203/45188 ,  H03F2203/45288 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45494 ,  H03F2203/45508

摘要： Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.

公开(公告)号：US09960947B2

公开(公告)日：2018-05-01

申请号：US15647275

申请日：2017-07-12

申请人： MEDIATEK INC.

发明人： Chien-Cheng Lin ,  Ming-Da Tsai

IPC分类号： H04B1/00 ,  H04L27/36 ,  H03D7/16 ,  H03F1/32 ,  H03C3/08 ,  H04B1/04

CPC分类号： H04L27/366 ,  H03C3/08 ,  H03D7/166 ,  H03F1/14 ,  H03F1/3205 ,  H03F1/3211 ,  H03F1/3264 ,  H03F3/21 ,  H03F3/45179 ,  H03F3/45183 ,  H03F2200/21 ,  H03F2200/213 ,  H03F2200/228 ,  H03F2200/249 ,  H03F2200/471 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2200/534 ,  H03F2200/75 ,  H03F2201/3218 ,  H03F2203/45036 ,  H03F2203/45101 ,  H03F2203/45112 ,  H03F2203/45134 ,  H03F2203/45136 ,  H03F2203/45138 ,  H03F2203/45146 ,  H03F2203/45151 ,  H03F2203/45156 ,  H03F2203/45168 ,  H03F2203/45172 ,  H03F2203/45208 ,  H03F2203/45256 ,  H03F2203/45292 ,  H03F2203/45312 ,  H03F2203/45356 ,  H03F2203/45374 ,  H03F2203/45386 ,  H03F2203/45402 ,  H03F2203/45436 ,  H03F2203/45544 ,  H03F2203/45596 ,  H03F2203/45622 ,  H04B2001/0408

摘要： A compensation circuit of a power amplifier includes a varactor, a voltage sensor and a control circuit. The varactor is coupled to an input terminal of the power amplifier. The voltage sensor is arranged for detecting an amplitude of an input signal of the power amplifier to generate a detecting result. The control circuit is coupled to the varactor and the voltage sensor, and is arranged for controlling a bias voltage of the varactor to adjust a capacitance of the varactor according to the detecting result.

公开(公告)号：US09385663B2

公开(公告)日：2016-07-05

申请号：US14350218

申请日：2012-10-04

申请人： SNAPTRACK, INC.

发明人： Gerard Wimpenny

IPC分类号： H04M1/02 ,  H03F1/02 ,  H03F3/26 ,  H03F3/19 ,  H03F3/21 ,  H03F3/45

CPC分类号： H03F1/0233 ,  H03F1/0222 ,  H03F3/19 ,  H03F3/21 ,  H03F3/26 ,  H03F3/45076 ,  H03F2200/09 ,  H03F2200/102 ,  H03F2200/504 ,  H03F2203/45172 ,  H04M1/0202

摘要： There is disclosed a power amplifier arrangement comprising: first and second active devices for amplifying in-phase and anti-phase parts of an input signal; a first DC supply network connected between the output of the first active device and a modulated supply voltage; a second DC supply network connected between the output of the second active device and the same modulated supply voltage and an output combiner for combining the amplified in-phase and anti-phase parts of the input signal.

摘要翻译： 公开了一种功率放大器装置，包括：用于放大输入信号的同相和反相部分的第一和第二有源器件; 连接在第一有源器件的输出端和调制电源电压之间的第一DC供电网络; 连接在第二有源器件的输出端和相同的调制电源电压之间的第二DC供电网络和用于组合输入信号的放大的同相和反相部分的输出组合器。

公开(公告)号：US20130265108A1

公开(公告)日：2013-10-10

申请号：US13591061

申请日：2012-08-21

申请人： Joos Dieter ,  Wim Philibert ,  Patrick Reynaert ,  Dixian Zhao

发明人： Joos Dieter ,  Wim Philibert ,  Patrick Reynaert ,  Dixian Zhao

IPC分类号： H03F3/45

CPC分类号： H03F1/0277 ,  H03F3/195 ,  H03F3/211 ,  H03F3/213 ,  H03F3/72 ,  H03F2200/06 ,  H03F2200/09 ,  H03F2200/222 ,  H03F2200/312 ,  H03F2200/396 ,  H03F2200/411 ,  H03F2200/414 ,  H03F2200/417 ,  H03F2200/421 ,  H03F2200/451 ,  H03F2200/534 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2200/72 ,  H03F2200/75 ,  H03F2203/21106 ,  H03F2203/21142 ,  H03F2203/21175 ,  H03F2203/45018 ,  H03F2203/45036 ,  H03F2203/45172 ,  H03F2203/45206 ,  H03F2203/45556 ,  H03F2203/45566 ,  H03F2203/45592 ,  H03F2203/45621 ,  H03F2203/45638 ,  H03F2203/45726 ,  H03F2203/45728 ,  H03F2203/45731 ,  H03F2203/7221 ,  H03F2203/7224 ,  H03H7/48

摘要： An Extremely High Frequency (EHF) dual-mode PA with a power combiner is designed using 40-nm bulk CMOS technology. One of the unit PAs can be switched off for the low power applications. In the design, circuit level optimization and trade-off are performed to ensure the good performance in both modes. The PA achieves a PSAT of 17.4 dBm with 29.3% PAE in high power mode and a PSAT of 12.6 dBm with 19.6% PAE in low power mode. The reliability measurements are also conducted and a lifetime of 80613 hours is estimated based on a commonly used empirical model. The excellent performance (e.g., highest reported PAE) achieved in this design further confirms the scaling of CMOS technology will continue to benefit the mm-wave transceiver design.

摘要翻译： 具有功率组合器的极高频（EHF）双模PA采用40-nm大容量CMOS技术设计。 对于低功率应用，其中一个单元PA可以关闭。 在设计中，执行电路级优化和权衡，以确保两种模式的良好性能。 PA在高功率模式下实现了17.4dBm的PSAT和29.3％的PAE，在低功率模式下，PAAT为12.6dBm，PAE为19.6％。 还进行可靠性测量，并且基于常用的经验模型估计80613小时的寿命。 在该设计中实现的优异性能（例如，报告最高的PAE）进一步证实了CMOS技术的扩展将继续有利于mm波收发器设计。

公开(公告)号：US09998080B2

公开(公告)日：2018-06-12

申请号：US15335181

申请日：2016-10-26

申请人： Infineon Technologies AG

发明人： Saverio Trotta

IPC分类号： H03F3/45 ,  H03F3/195 ,  H03F1/02

CPC分类号： H03F3/45085 ,  H03F1/0205 ,  H03F1/0261 ,  H03F3/191 ,  H03F3/195 ,  H03F3/45089 ,  H03F2200/12 ,  H03F2200/451 ,  H03F2203/45031 ,  H03F2203/45056 ,  H03F2203/45151 ,  H03F2203/45172 ,  H03F2203/45392

摘要： A circuit includes a differential input pair stage including bipolar transistors and configured to receive an RF input signal; a cascode stage coupled between the differential input pair stage and an output node, the cascode stage including bipolar transistors; and a current source including a first bipolar transistor coupled to a first output of the differential input pair stage and a second bipolar transistor coupled to a second output of the differential input pair stage.

公开(公告)号：US20180115289A1

公开(公告)日：2018-04-26

申请号：US15335181

申请日：2016-10-26

申请人： Infineon Technologies AG

发明人： Saverio Trotta

IPC分类号： H03F3/45 ,  H03F3/195 ,  H03F1/02

CPC分类号： H03F3/45085 ,  H03F1/0205 ,  H03F1/0261 ,  H03F3/191 ,  H03F3/195 ,  H03F3/45089 ,  H03F2200/12 ,  H03F2200/451 ,  H03F2203/45031 ,  H03F2203/45056 ,  H03F2203/45151 ,  H03F2203/45172 ,  H03F2203/45392

摘要： A circuit includes a differential input pair stage including bipolar transistors and configured to receive an RF input signal; a cascode stage coupled between the differential input pair stage and an output node, the cascode stage including bipolar transistors; and a current source including a first bipolar transistor coupled to a first output of the differential input pair stage and a second bipolar transistor coupled to a second output of the differential input pair stage.

公开(公告)号：US20170214369A1

公开(公告)日：2017-07-27

申请号：US15361468

申请日：2016-11-27

申请人： MEDIATEK INC.

发明人： Chien-Wei Tseng ,  Ming-Da Tsai

IPC分类号： H03F1/26 ,  H03F3/21 ,  H03F3/193 ,  H03F3/45

CPC分类号： H03F1/26 ,  H03F1/0261 ,  H03F1/301 ,  H03F3/193 ,  H03F3/195 ,  H03F3/21 ,  H03F3/245 ,  H03F3/45071 ,  H03F3/45085 ,  H03F3/45179 ,  H03F3/45183 ,  H03F2200/219 ,  H03F2200/225 ,  H03F2203/45144 ,  H03F2203/45154 ,  H03F2203/45172 ,  H03F2203/45542 ,  H03F2203/45621 ,  H03F2203/50

摘要： A power amplifier system includes a differential power amplifier and a bias circuit. The differential power amplifier is arranged for receiving a differential input pair to generate an output signal. The bias circuit is arranged for generating a bias voltage to bias the differential power amplifier, and the bias circuit comprises a source follower for receiving a reference voltage to generate the bias voltage.